21.1.53 (22 December 2021)

Enhancements

  • DVT-16791 Ability to expand `include directives in the body of a module

21.1.52 (14 December 2021)

Enhancements

  • DVT-16769 Ability to configure diagram generation timeout and layout attempts

  • DVT-16883 Add documentation for internal classes

21.1.50 (23 November 2021)

Enhancements

  • DVT-16730 Add HTML footer for VHDL and e Language documentations

21.1.48 (16 November 2021)

Bugfixes

  • DVT-16772 Natural Docs images do not work

21.1.44 (19 October 2021)

Enhancements

  • DVT-15815 Ability to embed WaveDrom description files within comments

  • DVT-16513 Organize generics in a table layout

Bugfixes

  • DVT-16316 Remove the ability to double-click on generate blocks in VHDL Schematic Diagrams

  • DVT-16728 NullPointerException when -lang value is not one of the supported values

21.1.41 (27 September 2021)

Bugfixes

  • DVT-16559 Ensure that DVT distro scripts run with POSIX mode disabled

21.1.39 (15 September 2021)

Features

  • DVT-11841 Add support for PlantUML comments that generate diagrams

21.1.35 (23 August 2021)

Bugfixes

  • DVT-16529 Specador: Progress indicator does not account for comment processors

21.1.34 (16 August 2021)

Enhancements

  • DVT-16268 Organize ports in a table-like layout

  • DVT-16314 Ability to export VHDL processes

  • DVT-16333 Ability to export eLanguage event callback methods

  • DVT-16490 Ability to highlight FSM states from the SVG diagram

Bugfixes

  • DVT-16334 Filter out constants from the Instances View in VHDL

  • DVT-16423 Export all eLanguage packages if preference file does not specify any

21.1.33 (9 August 2021)

Bugfixes

  • DVT-16465 Multiple exceptions thrown when dvt_build.log is read-only

21.1.32 (3 August 2021)

Bugfixes

  • DVT-10028 Progress indicator does not account for e Language UML diagrams

  • DVT-15898 Progress indicator reports values over maximum value

21.1.26 (22 June 2021)

Features

  • DVT-6057 Export source code with highlight and hyperlinks

21.1.25 (16 June 2021)

Features

  • DVT-9801 Export generics for VHDL entities

Enhancements

  • DVT-16267 Collect inline comments for port declarations in VHDL

21.1.22 (24 May 2021)

Bugfixes

  • DVT-16160 Custom menu references should contain relative paths

  • DVT-16162 External documentation hyperlinks should contain relative paths

  • DVT-16237 Hardwire the shell used by distribution scripts to /bin/bash

21.1.19 (10 May 2021)

Bugfixes

  • DVT-16131 DPI references to Doxygen documentation should contain relative paths

  • DVT-16139 SystemVerilog packages miss an entry for DPI functions in the navigation menu

21.1.18 (28 April 2021)

Bugfixes

  • DVT-16110 Tool does not start under certain Windows 10 configurations

21.1.17 (26 April 2021)

Features

  • DVT-16066 Create a separate entry for DPI functions

  • DVT-16103 Ability to integrate with external Doxygen documentation

21.1.9 (8 March 2021)

Bugfixes

  • DVT-15890 Diagrams page not generated for Verilog projects

21.1.7 (22 February 2021)

Features

  • DVT-15544 Add -license_queue_timeout argument to specify the maximum time in seconds to wait in queue for a license

Enhancements

  • DVT-15543 Print the “Waiting for license…” message event when using -silent argument

21.1.1 (11 January 2021)

HIGHLIGHTS

Note: Some of the highlights below were rolled-out in 20.1.# hotfix releases for early adopters.

  • Performance improvements and enhancements for JavaDoc and Natural Docs comment formatting

  • New UVM Register Bitfield Diagrams

  • Hyperlinks for UML, schematic and flow diagrams

  • Ability to see Verilog design tops in the main navigation menu

REMOVED

  • DVT-15680 Removed the ability to generate documentation using the old look and feel

Bugfixes

  • DVT-15695 Waivers generated by +dvt_auto_snps_vip_waivers should be applied automatically in batch mode