ovm_push_sequencer.svh

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00001 //----------------------------------------------------------------------
00002 //   Copyright 2007-2008 Mentor Graphics Corporation
00003 //   Copyright 2007-2008 Cadence Design Systems, Inc.
00004 //   All Rights Reserved Worldwide
00005 //
00006 //   Licensed under the Apache License, Version 2.0 (the
00007 //   "License"); you may not use this file except in
00008 //   compliance with the License.  You may obtain a copy of
00009 //   the License at
00010 //
00011 //       http://www.apache.org/licenses/LICENSE-2.0
00012 //
00013 //   Unless required by applicable law or agreed to in
00014 //   writing, software distributed under the License is
00015 //   distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
00016 //   CONDITIONS OF ANY KIND, either express or implied.  See
00017 //   the License for the specific language governing
00018 //   permissions and limitations under the License.
00019 //----------------------------------------------------------------------
00020 
00021 
00022 typedef class ovm_sequence_base;
00023 
00024 class ovm_push_sequencer #(type REQ = ovm_sequence_item,
00025                            type RSP = REQ) extends ovm_sequencer_param_base #(REQ, RSP);
00026 
00027   typedef ovm_push_sequencer #( REQ , RSP) this_type;
00028 
00029   ovm_blocking_put_port #(REQ) req_port;
00030 
00031   function new (string name, ovm_component parent);
00032     super.new(name, parent);
00033 
00034     req_port              = new ("req_port", this);
00035   endfunction // new
00036 
00037 
00038   task run();
00039     REQ t;
00040     integer selected_sequence;
00041     
00042     forever
00043       begin
00044         do 
00045           begin
00046             wait_for_sequences();
00047             selected_sequence = choose_next_request();
00048             if (selected_sequence == -1) begin
00049               wait_for_available_sequence();
00050             end
00051           end while (selected_sequence == -1);
00052         // issue grant
00053         if (selected_sequence >= 0) begin
00054           set_arbitration_completed(arb_sequence_q[selected_sequence].request_id);
00055           arb_sequence_q.delete(selected_sequence);
00056           m_update_lists();
00057         end
00058         m_req_fifo.get(t);
00059         req_port.put(t);
00060         m_wait_for_item_sequence_id = t.get_sequence_id();
00061         m_wait_for_item_transaction_id = t.get_transaction_id();
00062       end // forever begin
00063   endtask
00064 
00065 endclass

Intelligent Design Verification
Intelligent Design Verification
Project: OVM, Revision: 1.1.0
Copyright (c) 2008 Intelligent Design Verification.
Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
A copy of the license is included here:
http://www.intelligentdv.com/licenses/fdl.txt
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