Module Automatic Instantiation
==============================

You need to type the first letters of the module name, then press :kbd:`Ctrl+Space` three (3) times. You can recognize module instances by their icon, it looks like a chip with ports ready to be glued in.

You can customize what gets generated from :menuselection:`menu Window --> Preferences --> DVT --> SystemVerilog --> Editor --> Content Assist` in the Auto-instantiation section.

.. figure:: ../../images/sv-module-auto-instantiation.png

.. rubric:: Autoinstance of library modules

For performance reasons, only the modules which are actually used in the design are compiled from -y libdirs and -v libfiles. However, DVT can help you instantiate any of the available library modules:

.. figure:: ../../images/common/compile_module_proposal.png

When picking a library module auto-instance proposal, the selected module is first compiled and then the instance is computed and inserted in code.

.. note::
   
   Because only the libdirs and libfiles which are actually used in the design are scanned at compile time, the list of auto-instantiation proposals may contain an entry to discover modules in unused libraries.
 
.. figure:: ../../images/common/scan_libraries_proposal.png

