DVT IDE for VS Code SystemVerilog User Guide
Rev. 24.1.12, 12 June 2024

22.5.2 Bit Field Diagrams for packed data types

To display a bit field diagram for a packed data type, you can:

  • hover over a packed struct or union type to see it in the tooltip

  • place the cursor on such an element and use the "DVT: Show Diagram" command

Declaration Tooltip Window Notes
The memory layout is represented horizontally from MSB to LSB.
Nested types are represented vertically.
Union members are separated with a blank line.
Additional information, for example the type of a member, can be found in the table below the diagram.

When generating the diagram using the "DVT: Show Diagram" command, you will get advanced functionalities such as zooming, panning, the option to save the diagram or copy the table contents to clipboard:

Tip: By clicking on a bit field within the diagram, you can automatically navigate to the corresponding table cell, and vice versa.

Note: To switch the layout of the diagram to a single lane use the toolbar button or go to File > Preferences > Settings > Extensions > DVT > Diagrams > Bitfield.

Note: Diagrams are rendered using the Bit Field library.