DVT IDE for VS Code VHDL User Guide
Rev. 24.2.25, 31 October 2024
| Table of Contents Use the New DVT Project Wizard (menu File > New > DVT Project) to create a DVT project in the same location as an existing Xilinx ISE/Vivado project. All source files and settings defined in the ISE/Vivado project configuration files will be automatically recognized. If you want to create a DVT project in a different location from your ISE/Vivado project location you must tune the .dvt/default.build file: +dvt_init_auto Implementation Note: ISE/Vivado projects are automatically recognized by the DVT build auto-configuration engine. For more details, see Auto-config. When the auto-configuration algorithm detects an ISE/Vivado project layout, it scans the existing ISE/Vivado project configuration files and automatically generates an equivalent DVT build configuration file (for example default.build.auto.1). Note: The New DVT Project Wizard automatically adds both Verilog and VHDL natures. You can manually adjust this setting. Note: For an ISE project, the required Xilinx libraries are automatically detected and compiled using the +dvt_init_xilinx directive in the generated auto build file. For a Vivado project, the required Xilinx libraries are NOT automatically detected and have to be manually specified. To manually specify the libraries, use the +dvt_init_xilinx directive in the project build configuration file: +dvt_init_xilinx+UNISIM+UNIMACRO_VER # Note that the +dvt_init_xilinx must be specified before the +dvt_init_auto directive Xilinx ISE/Vivado Auto-config Specific Directives
In order to compile Xilinx libraries:
For example: +dvt_init_xilinx+UNISIM+UNIMACRO_VER The available libraries are UNISIM, UNIMACRO, UNIFAST, XILINXCORELIB, CPLD, SIMPRIM, SECUREIP_VER, UNISIMS_VER, UNIFAST_VER, UNIMACRO_VER, SIMPRIMS_VER, XILINXCORELIB_VER, UNI9000_VER, CPLD_VER, RETARGET, XPM. |