Entity cache_tagunit_seq

Block Diagram of cache_tagunit_seq

Generics

Name	Type	Default	Description
REPLACEMENT_POLICY	string	"LRU"
CACHE_LINES	positive	32
ASSOCIATIVITY	positive	32
TAG_BITS	positive	128
CHUNK_BITS	positive	8
TAG_BYTE_ORDER	T_BYTE_ORDER	LITTLE_ENDIAN
USE_INITIAL_TAGS	boolean	false
INITIAL_TAGS	T_SLM	(0 downto 0 => (127 downto 0 => '0'))

Ports

Name	Type	Direction	Description
Clock	std_logic	in
Reset	std_logic	in
Replace	std_logic	in
Replaced	std_logic	out
Replace_NewTag_rst	std_logic	out
Replace_NewTag_rev	std_logic	out
Replace_NewTag_nxt	std_logic	out
Replace_NewTag_Data	std_logic_vector	in
Replace_NewIndex	std_logic_vector	out
Request	std_logic	in
Request_ReadWrite	std_logic	in
Request_Invalidate	std_logic	in
Request_Tag_rst	std_logic	out
Request_Tag_rev	std_logic	out
Request_Tag_nxt	std_logic	out
Request_Tag_Data	std_logic_vector	in
Request_Index	std_logic_vector	out
Request_TagHit	std_logic	out
Request_TagMiss	std_logic	out

• Architecture rtl of cache_tagunit_seq
  • Processes

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