Component fifo_shift

Block Diagram of fifo_shift

Simple FIFO backed by a shift register.

Generics

Name	Type	Initial Value	Description
D_BITS	positive		Data Width
MIN_DEPTH	positive		Minimum FIFO Size in Words

Ports

Name	Direction	Type	Description
clk	in	std_logic	Global Control
rst	in	std_logic
put	in	std_logic	Writing Interface Write Request
din	in	std_logic_vector	Input Data
ful	out	std_logic	Capacity Exhausted
got	in	std_logic	Reading Interface Read Done Strobe
dout	out	std_logic_vector	Output Data
vld	out	std_logic	Data Valid

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