Architecture rtl of fifo_ic_got

Processes

process @ ( clk_wr or )

Update Write Pointer upon puti

FSM Transitions for Ful

#	Current State	Next State	Condition
1	'1'	'0'	[(not (rst_wr = '1') and not (IP0 = not OPc(A_BITS) & OPc(A_BITS - 1 downto 0)))]

process @ ( clk_rd or )

FSM Transitions for Avl

#	Current State	Next State	Condition
1	'0'	'1'	[(not (rst_rd = '1') and not (OP0 = IPc))]

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