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Entity io_TimingCounter

TIMING_TABLEClockstd_logicEnablestd_logicLoadstd_logicSlot[TIMING_TABLE ' length - 1]naturalTimeoutstd_logic

Block Diagram of io_TimingCounter

This down-counter can be configured with a TIMING_TABLE (a ROM), from which the initial counter value is loaded. The table index can be selected by Slot. Timeout is a registered output. Up to 16 values fit into one ROM consisting of log2ceilnz(imax(TIMING_TABLE)) + 1 6-input LUTs.

Generics

Name

Type

Default

Description

TIMING_TABLE

T_NATVEC

timing table

Ports

Name

Type

Direction

Description

Clock

std_logic

in

clock

Enable

std_logic

in

enable counter

Load

std_logic

in

load Timing Value from TIMING_TABLE selected by slot

Slot

natural

in

Timeout

std_logic

out

timing reached