Entity ipv6_RX

Block Diagram of ipv6_RX

Generics

Name	Type	Default	Description
DEBUG	boolean	FALSE

Ports

Name	Type	Direction	Description
Clock	std_logic	in
Reset	std_logic	in
Error	std_logic	out	STATUS port
In_Valid	std_logic	in	IN port
In_Data	T_SLV_8	in
In_SOF	std_logic	in
In_EOF	std_logic	in
In_Ack	std_logic	out
In_Meta_rst	std_logic	out
In_Meta_SrcMACAddress_nxt	std_logic	out
In_Meta_SrcMACAddress_Data	T_SLV_8	in
In_Meta_DestMACAddress_nxt	std_logic	out
In_Meta_DestMACAddress_Data	T_SLV_8	in
In_Meta_EthType	T_SLV_16	in
Out_Valid	std_logic	out	OUT port
Out_Data	T_SLV_8	out
Out_SOF	std_logic	out
Out_EOF	std_logic	out
Out_Ack	std_logic	in
Out_Meta_rst	std_logic	in
Out_Meta_SrcMACAddress_nxt	std_logic	in
Out_Meta_SrcMACAddress_Data	T_SLV_8	out
Out_Meta_DestMACAddress_nxt	std_logic	in
Out_Meta_DestMACAddress_Data	T_SLV_8	out
Out_Meta_EthType	T_SLV_16	out
Out_Meta_SrcIPv6Address_nxt	std_logic	in
Out_Meta_SrcIPv6Address_Data	T_SLV_8	out
Out_Meta_DestIPv6Address_nxt	std_logic	in
Out_Meta_DestIPv6Address_Data	T_SLV_8	out
Out_Meta_TrafficClass	T_SLV_8	out
Out_Meta_FlowLabel	T_SLV_24	out	STD_LOGIC_VECTOR(19 downto 0);
Out_Meta_Length	T_SLV_16	out
Out_Meta_NextHeader	T_SLV_8	out

• Architecture rtl of ipv6_RX
  • Processes

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