[source]

Component ocram_sp

A_BITSD_BITSFILENAMEclkstd_logiccestd_logicwestd_logica[A_BITS - 1 downto 0]unsignedd[D_BITS - 1 downto 0]std_logic_vectorqstd_logic_vector[D_BITS - 1 downto 0]

Block Diagram of ocram_sp

Single-Port

Generics

Name

Type

Initial Value

Description

A_BITS

positive

D_BITS

positive

FILENAME

string

""

Ports

Name

Direction

Type

Description

clk

in

std_logic

ce

in

std_logic

we

in

std_logic

a

in

unsigned

d

in

std_logic_vector

q

out

std_logic_vector