[source]

Entity udp_Wrapper

DEBUGIP_VERSIONPORTPAIRSClockstd_logicResetstd_logicIP_TX_Ackstd_logicIP_TX_Meta_rststd_logicIP_TX_Meta_SrcIPAddress_nxtstd_logicIP_TX_Meta_DestIPAddress_nxtstd_logicIP_RX_Validstd_logicIP_RX_DataT_SLV_8IP_RX_SOFstd_logicIP_RX_EOFstd_logicIP_RX_Meta_SrcMACAddress_DataT_SLV_8IP_RX_Meta_DestMACAddress_DataT_SLV_8IP_RX_Meta_EthTypeT_SLV_16IP_RX_Meta_SrcIPAddress_DataT_SLV_8IP_RX_Meta_DestIPAddress_DataT_SLV_8IP_RX_Meta_LengthT_SLV_16IP_RX_Meta_ProtocolT_SLV_8TX_Valid[PORTPAIRS ' length - 1 downto 0]std_logic_vectorTX_Data[PORTPAIRS ' length - 1 downto 0]T_SLVV_8TX_SOF[PORTPAIRS ' length - 1 downto 0]std_logic_vectorTX_EOF[PORTPAIRS ' length - 1 downto 0]std_logic_vectorTX_Meta_SrcIPAddress_Data[PORTPAIRS ' length - 1 downto 0]T_SLVV_8TX_Meta_DestIPAddress_Data[PORTPAIRS ' length - 1 downto 0]T_SLVV_8TX_Meta_SrcPort[PORTPAIRS ' length - 1 downto 0]T_SLVV_16TX_Meta_DestPort[PORTPAIRS ' length - 1 downto 0]T_SLVV_16TX_Meta_Length[PORTPAIRS ' length - 1 downto 0]T_SLVV_16RX_Ack[PORTPAIRS ' length - 1 downto 0]std_logic_vectorRX_Meta_rst[PORTPAIRS ' length - 1 downto 0]std_logic_vectorRX_Meta_SrcMACAddress_nxt[PORTPAIRS ' length - 1 downto 0]std_logic_vectorRX_Meta_DestMACAddress_nxt[PORTPAIRS ' length - 1 downto 0]std_logic_vectorRX_Meta_SrcIPAddress_nxt[PORTPAIRS ' length - 1 downto 0]std_logic_vectorRX_Meta_DestIPAddress_nxt[PORTPAIRS ' length - 1 downto 0]std_logic_vectorIP_TX_Validstd_logicIP_TX_DataT_SLV_8IP_TX_SOFstd_logicIP_TX_EOFstd_logicIP_TX_Meta_SrcIPAddress_DataT_SLV_8IP_TX_Meta_DestIPAddress_DataT_SLV_8IP_TX_Meta_LengthT_SLV_16IP_RX_Ackstd_logicIP_RX_Meta_rststd_logicIP_RX_Meta_SrcMACAddress_nxtstd_logicIP_RX_Meta_DestMACAddress_nxtstd_logicIP_RX_Meta_SrcIPAddress_nxtstd_logicIP_RX_Meta_DestIPAddress_nxtstd_logicTX_Ackstd_logic_vector[PORTPAIRS ' length - 1 downto 0]TX_Meta_rststd_logic_vector[PORTPAIRS ' length - 1 downto 0]TX_Meta_SrcIPAddress_nxtstd_logic_vector[PORTPAIRS ' length - 1 downto 0]TX_Meta_DestIPAddress_nxtstd_logic_vector[PORTPAIRS ' length - 1 downto 0]RX_Validstd_logic_vector[PORTPAIRS ' length - 1 downto 0]RX_DataT_SLVV_8[PORTPAIRS ' length - 1 downto 0]RX_SOFstd_logic_vector[PORTPAIRS ' length - 1 downto 0]RX_EOFstd_logic_vector[PORTPAIRS ' length - 1 downto 0]RX_Meta_SrcMACAddress_DataT_SLVV_8[PORTPAIRS ' length - 1 downto 0]RX_Meta_DestMACAddress_DataT_SLVV_8[PORTPAIRS ' length - 1 downto 0]RX_Meta_EthTypeT_SLVV_16[PORTPAIRS ' length - 1 downto 0]RX_Meta_SrcIPAddress_DataT_SLVV_8[PORTPAIRS ' length - 1 downto 0]RX_Meta_DestIPAddress_DataT_SLVV_8[PORTPAIRS ' length - 1 downto 0]RX_Meta_LengthT_SLVV_16[PORTPAIRS ' length - 1 downto 0]RX_Meta_ProtocolT_SLVV_8[PORTPAIRS ' length - 1 downto 0]RX_Meta_SrcPortT_SLVV_16[PORTPAIRS ' length - 1 downto 0]RX_Meta_DestPortT_SLVV_16[PORTPAIRS ' length - 1 downto 0]

Block Diagram of udp_Wrapper

Generics

Name

Type

Default

Description

DEBUG

boolean

FALSE

IP_VERSION

positive

6

PORTPAIRS

T_NET_UDP_PORTPAIR_VECTOR

(0 => (x"0000", x"0000"))

Ports

Name

Type

Direction

Description

Clock

std_logic

in

Reset

std_logic

in

IP_TX_Valid

std_logic

out

from IP layer

IP_TX_Data

T_SLV_8

out

IP_TX_SOF

std_logic

out

IP_TX_EOF

std_logic

out

IP_TX_Ack

std_logic

in

IP_TX_Meta_rst

std_logic

in

IP_TX_Meta_SrcIPAddress_nxt

std_logic

in

IP_TX_Meta_SrcIPAddress_Data

T_SLV_8

out

IP_TX_Meta_DestIPAddress_nxt

std_logic

in

IP_TX_Meta_DestIPAddress_Data

T_SLV_8

out

IP_TX_Meta_Length

T_SLV_16

out

IP_RX_Valid

std_logic

in

to IP layer

IP_RX_Data

T_SLV_8

in

IP_RX_SOF

std_logic

in

IP_RX_EOF

std_logic

in

IP_RX_Ack

std_logic

out

IP_RX_Meta_rst

std_logic

out

IP_RX_Meta_SrcMACAddress_nxt

std_logic

out

IP_RX_Meta_SrcMACAddress_Data

T_SLV_8

in

IP_RX_Meta_DestMACAddress_nxt

std_logic

out

IP_RX_Meta_DestMACAddress_Data

T_SLV_8

in

IP_RX_Meta_EthType

T_SLV_16

in

IP_RX_Meta_SrcIPAddress_nxt

std_logic

out

IP_RX_Meta_SrcIPAddress_Data

T_SLV_8

in

IP_RX_Meta_DestIPAddress_nxt

std_logic

out

IP_RX_Meta_DestIPAddress_Data

T_SLV_8

in

IP_RX_Meta_Length

T_SLV_16

in

IP_RX_Meta_TrafficClass : in T_SLV_8; IP_RX_Meta_FlowLabel : in T_SLV_24;

IP_RX_Meta_Protocol

T_SLV_8

in

TX_Valid

std_logic_vector

in

from upper layer

TX_Data

T_SLVV_8

in

TX_SOF

std_logic_vector

in

TX_EOF

std_logic_vector

in

TX_Ack

std_logic_vector

out

TX_Meta_rst

std_logic_vector

out

TX_Meta_SrcIPAddress_nxt

std_logic_vector

out

TX_Meta_SrcIPAddress_Data

T_SLVV_8

in

TX_Meta_DestIPAddress_nxt

std_logic_vector

out

TX_Meta_DestIPAddress_Data

T_SLVV_8

in

TX_Meta_SrcPort

T_SLVV_16

in

TX_Meta_DestPort

T_SLVV_16

in

TX_Meta_Length

T_SLVV_16

in

RX_Valid

std_logic_vector

out

to upper layer

RX_Data

T_SLVV_8

out

RX_SOF

std_logic_vector

out

RX_EOF

std_logic_vector

out

RX_Ack

std_logic_vector

in

RX_Meta_rst

std_logic_vector

in

RX_Meta_SrcMACAddress_nxt

std_logic_vector

in

RX_Meta_SrcMACAddress_Data

T_SLVV_8

out

RX_Meta_DestMACAddress_nxt

std_logic_vector

in

RX_Meta_DestMACAddress_Data

T_SLVV_8

out

RX_Meta_EthType

T_SLVV_16

out

RX_Meta_SrcIPAddress_nxt

std_logic_vector

in

RX_Meta_SrcIPAddress_Data

T_SLVV_8

out

RX_Meta_DestIPAddress_nxt

std_logic_vector

in

RX_Meta_DestIPAddress_Data

T_SLVV_8

out

RX_Meta_Length

T_SLVV_16

out

RX_Meta_TrafficClass : out T_SLVV_8(PORTPAIRS'length - 1 downto 0); RX_Meta_FlowLabel : out T_SLVV_24(PORTPAIRS'length - 1 downto 0);

RX_Meta_Protocol

T_SLVV_8

out

RX_Meta_SrcPort

T_SLVV_16

out

RX_Meta_DestPort

T_SLVV_16

out