Package utils
For detailed documentation see below.
Name |
Value |
Description |
---|---|---|
SIMULATION |
Distinguishes simulation from synthesis deferred constant declaration |
|
C_BCD_MINUS |
"1010" |
|
C_BCD_OFF |
"1011" |
Name |
Description |
---|---|
T_BOOLVEC |
|
T_INTVEC |
|
T_NATVEC |
|
T_POSVEC |
|
T_REALVEC |
|
T_INT_8 |
|
T_INT_16 |
|
T_UINT_8 |
|
T_UINT_16 |
|
T_IPSTYLE |
|
T_BIT_ORDER |
Bit order |
T_BYTE_ORDER |
Byte order (Endian) |
T_POLARITY |
Active logic level |
T_CLOCK_EDGE |
active clock edge |
T_ROUNDING_STYLE |
rounding style |
T_BCD |
define a new unrelated type T_BCD for arithmetic QUESTION: extract to an own BCD package? => overloaded operators for +/-/=/... and conversion functions |
T_BCD_VECTOR |
Functions
- virtual function T_BIT_ORDER "not" ( T_BIT_ORDER left ) [source]
- virtual function T_BYTE_ORDER "not" ( T_BYTE_ORDER left ) [source]
- virtual function T_POLARITY "not" ( T_POLARITY left ) [source]
- virtual function T_CLOCK_EDGE "not" ( T_CLOCK_EDGE left ) [source]
- virtual function bit "xor" ( T_POLARITY left, bit right ) [source]
- virtual function bit_vector "xor" ( T_POLARITY left, bit_vector right ) [source]
- virtual function STD_LOGIC "xor" ( T_POLARITY left, std_logic right ) [source]
- virtual function STD_LOGIC_VECTOR "xor" ( T_POLARITY left, std_logic_vector right ) [source]
- virtual function bit "xor" ( bit left, T_POLARITY right ) [source]
- virtual function bit_vector "xor" ( bit_vector left, T_POLARITY right ) [source]
- virtual function STD_LOGIC "xor" ( std_logic left, T_POLARITY right ) [source]
- virtual function STD_LOGIC_VECTOR "xor" ( std_logic_vector left, T_POLARITY right ) [source]
- virtual function bit "xnor" ( T_POLARITY left, bit right ) [source]
- virtual function bit_vector "xnor" ( T_POLARITY left, bit_vector right ) [source]
- virtual function STD_LOGIC "xnor" ( T_POLARITY left, std_logic right ) [source]
- virtual function STD_LOGIC_VECTOR "xnor" ( T_POLARITY left, std_logic_vector right ) [source]
- virtual function bit "xnor" ( bit left, T_POLARITY right ) [source]
- virtual function bit_vector "xnor" ( bit_vector left, T_POLARITY right ) [source]
- virtual function STD_LOGIC "xnor" ( std_logic left, T_POLARITY right ) [source]
- virtual function STD_LOGIC_VECTOR "xnor" ( std_logic_vector left, T_POLARITY right ) [source]
- virtual function T_BCD_VECTOR to_BCD_Vector ( integer Value, natural Size, T_BCD Fill ) [source]
- virtual function T_BCD_VECTOR to_BCD_Vector ( string Value, natural Size, T_BCD Fill ) [source]
- virtual function integer scale ( integer Value, integer Minimum, integer Maximum, T_ROUNDING_STYLE RoundingStyle ) [source]
scale a value into a range [Minimum, Maximum]
- virtual function integer scale ( REAL Value, integer Minimum, integer Maximum, T_ROUNDING_STYLE RoundingStyle ) [source]
- virtual function bit_vector resize ( bit_vector vec, natural length, bit fill ) [source]
Resizes the vector to the specified length. The adjustment is make on on the 'high end of the vector. The 'low index remains as in the argument. If the result vector is larger, the extension uses the provided fill value (default: '0'). Use the resize functions of the numeric_std package for value-preserving resizes of the signed and unsigned data types.
@synthesis supported
- virtual function UNSIGNED onehot2bin ( std_logic_vector onehot, integer empty_val ) [source]
- One-Hot-Code to Binary-Code.
If a non-negative value empty_val is specified, its unsigned representation will be returned upon an all-zero input. As a consequence of specifying this value, no simulation warnings will be issued upon empty inputs. Alleged 1-hot-encoded inputs with more than one bit asserted will always raise a simulation warning.