Verissimo runs continuously every 6 hours on master branch for the top-earlgrey chip and ip blocks.
The executed subset of Verissimo rules is based on lowRISC coding guidelines.
| Project | Commit | Result | ||
|---|---|---|---|---|
| chip_earlgrey_asic |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
12207 errors, 11 warnings |
OPEN COMPARE
Common: 12207 errors, 11 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
12207 errors, 11 warnings |
|||
| adc_ctrl |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1028 errors |
OPEN COMPARE
Common: 1028 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1028 errors |
|||
| aes_masked |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1527 errors, 20 warnings |
OPEN COMPARE
Common: 1527 errors, 20 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1527 errors, 20 warnings |
|||
| aes_unmasked |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1527 errors, 20 warnings |
OPEN COMPARE
Common: 1527 errors, 20 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1527 errors, 20 warnings |
|||
| alert_handler |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1897 errors |
OPEN COMPARE
Common: 1897 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1897 errors |
|||
| aon_timer |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1703 errors |
OPEN COMPARE
Common: 1703 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1703 errors |
|||
| clkmgr |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1038 errors, 1 warning |
OPEN COMPARE
Common: 1038 errors, 1 warning |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1038 errors, 1 warning |
|||
| csrng |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1588 errors, 2 warnings |
OPEN COMPARE
Common: 1588 errors, 2 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1588 errors, 2 warnings |
|||
| edn |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1201 errors |
OPEN COMPARE
Common: 1201 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1201 errors |
|||
| entropy_src |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1720 errors, 2 warnings |
OPEN COMPARE
Common: 1720 errors, 2 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1720 errors, 2 warnings |
|||
| flash_ctrl |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
2335 errors, 30 warnings |
OPEN COMPARE
Common: 2335 errors, 30 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
2335 errors, 30 warnings |
|||
| gpio |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
980 errors |
OPEN COMPARE
Common: 980 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
980 errors |
|||
| hmac |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1084 errors, 1 warning |
OPEN COMPARE
Common: 1084 errors, 1 warning |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1084 errors, 1 warning |
|||
| i2c |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1447 errors, 1 warning |
OPEN COMPARE
Common: 1447 errors, 1 warning |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1447 errors, 1 warning |
|||
| keymgr |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1200 errors, 2 warnings |
OPEN COMPARE
Common: 1200 errors, 2 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1200 errors, 2 warnings |
|||
| kmac_masked |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1328 errors |
OPEN COMPARE
Common: 1328 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1328 errors |
|||
| kmac_unmasked |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1328 errors |
OPEN COMPARE
Common: 1328 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1328 errors |
|||
| lc_ctrl_volatile_unlock_disabled |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1583 errors, 1 warning |
OPEN COMPARE
Common: 1583 errors, 1 warning |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1583 errors, 1 warning |
|||
| lc_ctrl_volatile_unlock_enabled |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1583 errors, 1 warning |
OPEN COMPARE
Common: 1583 errors, 1 warning |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1583 errors, 1 warning |
|||
| otbn |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1321 errors, 100 warnings |
OPEN COMPARE
Common: 1321 errors, 100 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1321 errors, 100 warnings |
|||
| otp_ctrl |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1373 errors |
OPEN COMPARE
Common: 1373 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1373 errors |
|||
| pattgen |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
921 errors |
OPEN COMPARE
Common: 921 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
921 errors |
|||
| prim_alert |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
67 errors |
OPEN COMPARE
Common: 67 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
67 errors |
|||
| prim_esc |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
13 errors |
OPEN COMPARE
Common: 13 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
13 errors |
|||
| prim_lfsr |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
14 errors |
OPEN COMPARE
Common: 14 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
14 errors |
|||
| prim_present |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
88 errors |
OPEN COMPARE
Common: 88 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
88 errors |
|||
| prim_prince |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
88 errors |
OPEN COMPARE
Common: 88 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
88 errors |
|||
| pwm |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
941 errors |
OPEN COMPARE
Common: 941 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
941 errors |
|||
| pwrmgr |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1386 errors |
OPEN COMPARE
Common: 1386 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1386 errors |
|||
| rom_ctrl_32kB |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1098 errors |
OPEN COMPARE
Common: 1098 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1098 errors |
|||
| rom_ctrl_64kB |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1098 errors |
OPEN COMPARE
Common: 1098 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1098 errors |
|||
| rstmgr_cnsty_chk |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
483 errors |
OPEN COMPARE
Common: 483 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
483 errors |
|||
| rstmgr |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1630 errors, 2 warnings |
OPEN COMPARE
Common: 1630 errors, 2 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1630 errors, 2 warnings |
|||
| rv_dm |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1703 errors, 1 warning |
OPEN COMPARE
Common: 1703 errors, 1 warning |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1703 errors, 1 warning |
|||
| rv_timer |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
888 errors |
OPEN COMPARE
Common: 888 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
888 errors |
|||
| spi_device_1r1w |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1394 errors, 5 warnings |
OPEN COMPARE
New Failures: 2 errors New Fixes: 2 errors Common: 1392 errors, 5 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1394 errors, 5 warnings |
|||
| spi_device_2p |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1394 errors, 5 warnings |
OPEN COMPARE
Common: 1394 errors, 5 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1394 errors, 5 warnings |
|||
| spi_host |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1211 errors |
OPEN COMPARE
Common: 1211 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1211 errors |
|||
| sram_ctrl_main |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
988 errors |
OPEN COMPARE
Common: 988 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
988 errors |
|||
| sram_ctrl_ret |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
988 errors |
OPEN COMPARE
Common: 988 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
988 errors |
|||
| sysrst_ctrl |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1218 errors, 7 warnings |
OPEN COMPARE
Common: 1218 errors, 7 warnings |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1218 errors, 7 warnings |
|||
| tl_host_if |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
386 errors |
OPEN COMPARE
Common: 386 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
386 errors |
|||
| uart |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1010 errors |
OPEN COMPARE
Common: 1010 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1010 errors |
|||
| usbdev |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
1637 errors |
OPEN COMPARE
Common: 1637 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
1637 errors |
|||
| xbar_main |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
886 errors |
OPEN COMPARE
Common: 886 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
886 errors |
|||
| xbar_peri |
Branch tip (current)
TREE
DIFF
c569456e3d / Robert Schilling / 4 hours ago [hw,ac_range_check,sec_cm] Add security countermeasures to the HJSON and design |
OPEN RESULTS
OPEN LOG
886 errors |
OPEN COMPARE
Common: 886 errors |
|
|
Previous commit (baseline)
TREE
DIFF
4065c04673 / Robert Schilling / 7 hours ago [hw,prim_alert,dv] Add 3 cycles clock skew to the testbench config |
OPEN RESULTS
OPEN LOG
886 errors |
|||