DVT IDE for VS Code VHDL User Guide
Rev. 24.1.22, 1 October 2024
Go to Product Page
Installation
System Requirements
Install DVT for VS Code from Marketplace
Install DVT for VS Code from VSIX
Install DVT for VS Code Using a Pre-Packed Distribution
Set the License
User Interface
VS Code User Interface
DVT IDE for VS Code User Interface
Editor
Activity Bar
Side Bar
Status Bar
Panel
Predefined Projects
Project Templates
What is a project template?
How to generate code from a project template
Step 1. Specify Directories
Step 2. Specify Parameters
Template Configuration
template-config.xml
Build Configurations
Project Natures
Non-top files
default.build
Auto-config
Simulator Log-config
Emulating compiler invocations
Multiple .build Files
Compatibility Modes
Default DVT Compatibility Mode
gcc Compatibility Mode
ius.irun Compatibility Mode
ius.perspec Compatibility Mode
questa.vcom Compatibility Mode
questa.vlog Compatibility Mode
questa.qrun Compatibility Mode
vcs.vhdlan Compatibility Mode
vcs.vlogan Compatibility Mode
xcelium.xrun Compatibility Mode
Paths
Strings
Comments
Environment Variables
Including Other Argument Files
Build Persistence
All Build Directives
SystemVerilog OVM or UVM Library Compilation
Xilinx Libraries Compilation
Intel(Altera) Quartus Libraries Compilation
Questa Libraries Compilation
Use of External Programs
Compile Checks
Compile Waivers
Semantic Checks
Non Standard Checks
Quick Fix Proposals
Content Assist (Autocomplete)
Content assist for CamelCase and Underscore
Code Templates
Component Automatic Instantiation
Generate Case Statement Using Autocomplete
Hyperlinks
Show Usages
Show Readers or Writers
Show Instances
Peek Exploration
Refactoring
Code Factory
Code Formatting
Capitalization
Whitespace
Indentation
Vertical Alignment
Line Wrapping
Disable Format for Code Sections
Preferences Keys
Breadcrumb Navigation Bar
Design Breadcrumb
Verification Breadcrumb
Scope Breadcrumb
Diagrams
Design Diagrams
Schematic Diagrams
Flow Diagrams
Block Diagrams
Finite-State Machine Diagrams
Design Diagram Actions
Design Diagram Filters
Bit Field Diagrams
WaveDrom Timing Diagrams
Common Diagram Actions
Common Diagram Toolbar
Syntax Coloring
Inactive Generates Code Highlight
Database Out of Sync Notification
Tooltips
Comments Formatting
Javadoc
Natural Docs
Workspace Symbols
Views
Problems View
Outline View
Compiled Files View
Compile Order View
Build Config Hierarchy
Design Hierarchy View
Diagnostics View
Quick Search in Views
CamelCase
Simple Regex
Hierarchical Search
Search for Members
Search Port in Design Hierarchy
Content Filters
Content Filters XML Syntax
Filtering by Element Type
Content Filters Examples
Predefined Content Filters
Export HTML/PDF Documentation
Preview HTML Documentation
External Tools Integration
Scripts
dvt_code.sh
dvt_code.sh Syntax
dvt_code.sh Examples
dvt_ls.sh
dvt_ls.sh Syntax
dvt_ls.sh Examples
Custom Scripts
SCM Checkout Hook
Memory Monitor
Application Notes
Flow Integration
Environment Variables
Design Elaboration
Top candidates
Parameter values
Unelaborated Design
Debugging
Performance
FPGA Support
Intel(Altera) Quartus
Intel(Altera) Quartus Libraries Compilation
Xilinx ISE/Vivado
Xilinx Libraries Compilation
Output and logging
Handy VS Code Documentation Pointers
What is New?
How to Report an Issue?
Legal Notices
Third Party Licenses
Q & A
Can I deactivate DVT support for a workspace even though one of my workspace folders contains a .dvt directory?
Next
DVT IDE for VS Code VHDL User Guide
Table of Contents
1. Installation
1.1. System Requirements
1.2. Install DVT for VS Code from Marketplace
1.3. Install DVT for VS Code from VSIX
1.4. Install DVT for VS Code Using a Pre-Packed Distribution
1.5. Set the License
2. User Interface
2.1. VS Code User Interface
2.2. DVT IDE for VS Code User Interface
2.2.1. Editor
2.2.2. Activity Bar
2.2.3. Side Bar
2.2.4. Status Bar
2.2.5. Panel
3. Predefined Projects
4. Project Templates
4.1. What is a project template?
4.2. How to generate code from a project template
4.2.1. Step 1. Specify Directories
4.2.2. Step 2. Specify Parameters
4.3. Template Configuration
4.3.1. template-config.xml
5. Build Configurations
5.1. Project Natures
5.2. Non-top files
5.3. default.build
5.4. Auto-config
5.5. Simulator Log-config
5.6. Emulating compiler invocations
5.7. Multiple .build Files
5.8. Compatibility Modes
5.8.1. Default DVT Compatibility Mode
5.8.2. gcc Compatibility Mode
5.8.3. ius.irun Compatibility Mode
5.8.4. ius.perspec Compatibility Mode
5.8.5. questa.vcom Compatibility Mode
5.8.6. questa.vlog Compatibility Mode
5.8.7. questa.qrun Compatibility Mode
5.8.8. vcs.vhdlan Compatibility Mode
5.8.9. vcs.vlogan Compatibility Mode
5.8.10. xcelium.xrun Compatibility Mode
5.9. Paths
5.10. Strings
5.11. Comments
5.12. Environment Variables
5.13. Including Other Argument Files
5.14. Build Persistence
5.15. All Build Directives
5.16. SystemVerilog OVM or UVM Library Compilation
5.17. Xilinx Libraries Compilation
5.18. Intel(Altera) Quartus Libraries Compilation
5.19. Questa Libraries Compilation
5.20. Use of External Programs
6. Compile Checks
6.1. Compile Waivers
6.2. Semantic Checks
6.3. Non Standard Checks
7. Quick Fix Proposals
8. Content Assist (Autocomplete)
8.1. Content assist for CamelCase and Underscore
8.2. Code Templates
8.3. Component Automatic Instantiation
8.4. Generate Case Statement Using Autocomplete
9. Hyperlinks
10. Show Usages
11. Show Readers or Writers
12. Show Instances
13. Peek Exploration
14. Refactoring
15. Code Factory
16. Code Formatting
16.1. Capitalization
16.2. Whitespace
16.3. Indentation
16.4. Vertical Alignment
16.5. Line Wrapping
16.6. Disable Format for Code Sections
16.7. Preferences Keys
17. Breadcrumb Navigation Bar
17.1. Design Breadcrumb
17.2. Verification Breadcrumb
17.3. Scope Breadcrumb
18. Diagrams
18.1. Design Diagrams
18.1.1. Schematic Diagrams
18.1.2. Flow Diagrams
18.1.3. Block Diagrams
18.1.4. Finite-State Machine Diagrams
18.1.5. Design Diagram Actions
18.1.6. Design Diagram Filters
18.2. Bit Field Diagrams
18.3. WaveDrom Timing Diagrams
18.4. Common Diagram Actions
18.5. Common Diagram Toolbar
19. Syntax Coloring
20. Inactive Generates Code Highlight
21. Database Out of Sync Notification
22. Tooltips
22.1. Comments Formatting
22.1.1. Javadoc
22.1.2. Natural Docs
23. Workspace Symbols
24. Views
24.1. Problems View
24.2. Outline View
24.3. Compiled Files View
24.4. Compile Order View
24.4.1. Build Config Hierarchy
24.5. Design Hierarchy View
24.6. Diagnostics View
25. Quick Search in Views
25.1. CamelCase
25.2. Simple Regex
25.3. Hierarchical Search
25.4. Search for Members
25.5. Search Port in Design Hierarchy
26. Content Filters
26.1. Content Filters XML Syntax
26.2. Filtering by Element Type
26.3. Content Filters Examples
26.4. Predefined Content Filters
27. Export HTML/PDF Documentation
27.1. Preview HTML Documentation
28. External Tools Integration
29. Scripts
29.1. dvt_code.sh
29.1.1. dvt_code.sh Syntax
29.1.2. dvt_code.sh Examples
29.2. dvt_ls.sh
29.2.1. dvt_ls.sh Syntax
29.2.2. dvt_ls.sh Examples
30. Custom Scripts
31. SCM Checkout Hook
32. Memory Monitor
33. Application Notes
33.1. Flow Integration
33.2. Environment Variables
33.3. Design Elaboration
33.3.1. Top candidates
33.3.2. Parameter values
33.3.3. Unelaborated Design
33.3.4. Debugging
33.3.5. Performance
33.4. FPGA Support
33.4.1. Intel(Altera) Quartus
33.4.2. Xilinx ISE/Vivado
33.5. Output and logging
34. Handy VS Code Documentation Pointers
35. What is New?
36. How to Report an Issue?
37. Legal Notices
38. Third Party Licenses
39. Q & A
39.1. Can I deactivate DVT support for a workspace even though one of my workspace folders contains a .dvt directory?