Class uvm_pkg::uvm_push_driver
Collaboration Diagram of uvm_push_driver
Name |
Default value |
Description |
---|---|---|
REQ |
uvm_sequence_item |
|
RSP |
REQ |
Name |
Type |
Description |
---|---|---|
req_export |
uvm_blocking_put_imp#(uvm_sequence_item, uvm_push_driver#(uvm_sequence_item, uvm_sequence_item)) |
Port req_export This export provides the blocking put interface whose default implementation produces an error. Derived drivers must override put with an appropriate implementation (and not call super.put). Ports connected to this export will supply the driver with transactions. |
rsp_port |
Port rsp_port This analysis port is used to send response transactions back to the originating sequencer. |
|
req |
||
rsp |
||
type_name |
string |
Constructors
- new(string name, uvm_component parent)
Function
new
Creates and initializes an instance of this class using the normal constructor arguments for uvm_component: name is the name of the instance, and parent is the handle to the hierarchical parent, if any.
- Parameters:
name (string)
parent (uvm_component)
Functions
- check_port_connections()
- end_of_elaboration_phase(uvm_phase phase)
- Parameters:
phase (uvm_phase)
- get_type_name()
Tasks
- put(uvm_sequence_item item)
- Parameters:
item (uvm_sequence_item)
CLASS
uvm_push_driver #(REQ,RSP)
Base class for a driver that passively receives transactions, i.e. does not initiate requests transactions. Also known as push mode. Its ports are typically connected to the corresponding ports in a push sequencer as follows:
The rsp_port needs connecting only if the driver will use it to write responses to the analysis export in the sequencer.