Generating Getters and Setters for SystemVerilog Class Fields with DVT Eclipse

Description

This video shows how easy it is to generate getter and setter functions for one or more SystemVerilog class fields with the DVT Eclipse IDE.

Transcript

With DVT, you can easily generate getter and setter functions for the fields of a SystemVerilog class.

Generating Getters and Setters for Class Fields

1. Place the mouse cursor at the desired insertion point inside the class.
2. Right-click, and go to Source, then Generate Getters and Setters.
3. A dialog pops up and lists all the class fields.
4. Use the checkboxes to indicate which getters and setters should be generated.
5. You can use convenience shortcuts to expand, collapse, and select or deselect all.
6. You can use the quick search box to locate a specific field.
7. When you click OK, the selected getter and setter functions are inserted in the editor at the cursor position.

Generating Getters and Setters for a Specific Field

Suppose you wish to generate the getter and setter functions for a specific field.

1. Type the name of the field.
2. Press Ctrl+Space.
3. Use the arrow keys to highlight the Generate Getters and Setters entry.
4. Hit the Enter key.
5. The Generate Getters and Setters dialog pops up with the matching elements already selected.
6. Hit the Enter key once more to insert the generated code in the editor.