Writing Better Code More Quickly with an IDE and Linting
Verissimo has caught some tricky variable bit width issues where a macro hid that only the lowest order bit was being compared. Both DVT IDE and Verissimo also save a lot of time. In the past, we found that when we wrote or edited code we spent too much time in a compile-debug-fix loop until it was clean. This happened hundreds, maybe thousands, of times on every project. With the ability to find and fix errors interactively within the IDE, that loop is significantly shorter. We get great team style alignment, with more efficient code reviews. So clearly we save many weeks of effort.
AMIQ EDA Integrated Development Environment #61DAC
I stopped by the AMIQ EDA booth at DAC to get an update from Tom Anderson about their Integrated Development Environment (IDE), aimed at helping design and verification engineers save time. In my early IC design days we used either vi or emacs and were happy with having a somewhat smart text editor. With an IDE you get a whole new way of creating clean RTL code quicker, and with that code being checked for correctness before simulation or synthesis you save time and money from using expensive EDA tool licenses too early.
AMIQ EDA at the 2024 Design Automation Conference
So what is new this year? For a start, we have added some cool features for SystemVerilog users to our Design and Verification Tools (DVT) Eclipse IDE and DVT IDE for Visual Studio (VS) Code. We now offer runtime elaboration of Universal Verification Methodology (UVM) code, making it easier to find and fix coding errors within the IDE editor. UVM is a complex verification library with lots of SystemVerilog macros, so the ability to elaborate and check code on the fly is valuable.
Handling Preprocessed Files in a Hardware IDE
I learned that users of the AMIQ EDA Design and Verification Tools (DVT) IDE family want to have access to all their favorite features even when editing files with preprocessor code. The AMIQ EDA team developed clever heuristics to enable full IDE capabilities when editing such files, just as they do with pure SystemVerilog. These features include navigational hyperlinks, autocomplete, on-the-fly error detection, quick fixes, refactoring, and all the advanced functionality DVT IDE users are addicted to.
2024 Outlook with Cristian Amitroaie, Founder and CEO of AMIQ EDA
For customer support, we’re investing in leveraged assets such as more intuitive user interfaces, more detailed documentation, and demo movies showing how to use our tools. We increased our investment in product quality by growing our QA team and enhancing our regression test suites. On the hiring side, we’ve found that an extensive internship program is a great way to find and train the best engineers.
Using Linting to Write Error-Free Testbench Code
This is the story of a team at Siemens that has integrated Verissimo SystemVerilog Linter into their verification process with impressive results. They noticed a significant increase in the quality and reliability of their code. This resulted in reusable, maintainable, and manageable verification IP components. The team used Verissimo to check more than 510 linting rules, reviewing this list regularly and adding new rules as they became available.
AMIQ Celebrating 20 Years in Consulting and EDA
Why did you start AMIQ?
To practice engineering within the semiconductor industry and help customers with high quality services and products
To give something back to the environment that we sprouted from and to prove it is possible to create value with local capital
To work with smart people who have a passion for engineering and to never work for incompetent managers again!
A Hardware IDE for VS Code Fans
I wondered whether there were any technical reasons to choose one version of DVT IDE over the other. Cristian said that they have worked very hard to make the two implementations as equivalent in functionality as possible. They have a common engine behind both interfaces to ensure consistency in code compilation and analysis. However, there are some differences in the user experience due to the different technologies used by the underlying platforms.
Using an IDE to Accelerate Hardware Language Learning
A discussion with Dr. Srinivas Boppu, Assistant Professor at Indian Institute of Technology (IIT) Bhubaneswar.
AMIQ EDA Adds Support for Visual Studio Code to DVT IDE Family
The product enables engineers to inspect a project through diagrams. Designers can use HDL diagrams such as schematic, state machine, and flow diagrams. Verification engineers can use UML diagrams such as inheritance and collaboration diagrams. Diagrams are hyperlinked and synchronized with the source code and can be saved for documentation purposes.