Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry.
Partners
EDA industry alliances are essential to deliver best in class products. We are thankful to our industry partners for keeping us up to date with requirements and future plans, helping us understand the big picture, and making sure our solutions fit users' expectations.
The Cadence® Connections® Verification Program brings together a worldwide network of services, training, and IP development experts that support Cadence verification solutions. Based on years of experience in re-usable verification intellectual property (VIP), the program members help you accelerate the adoption of new technologies and improve the productivity of your verification teams.
The Eclipse ecosystem is a vibrant community of major software vendors, small innovative software start-ups, leading information and publishing organizations, education and service providers and influential research and standards organizations. The community works to develop the complementary products, services and information, and market specific solutions that have been critical to the success of the Eclipse Platform.
The Questa Vanguard Program (QVP) extends Mentor Graphics' breadth of design and verification technologies through partnerships with industry-leading companies.
The overarching goal of the OpenHW Foundation is to develop, protect, and promote the free and open-source cores, related intellectual property, tools, software (such as the CORE-V Family of open source RISC-V processors) and related activities. These initiatives may address strategic or market analysis, technical requirements, and digital sovereignty. By working collaboratively, members can pursue these initiatives and have a positive impact with strategic open hardware and related open software projects.
Universal Verification Methodology (UVM) is a standard to enable guaranteed development and reuse of verification environments and verification IP (VIP) throughout the electronics industry. Accellera provides both an API standard for UVM and a reference implementation. That reference implementation is a class library defined using the syntax and semantics of SystemVerilog (IEEE 1800).