How to Generate Bit Field Diagrams for Packed Data Types in the DVT IDE for VS Code
Description
This video shows how you can easily generate bit field diagrams from System Verilog packed data types in the DVT IDE for VS Code.
For more information:https://dvteclipse.com/documentation/sv_vscode/Bitfield_Diagrams_for_packed_data_types.html
This video was shot using DVT 22.1.36