Refactoring in the DVT Eclipse IDE - How to Add a New Port or Parameter to a Module


In DVT you can easily add a new port or parameter/generic to a Verilog module or VHDL entity.

Place the editor cursor on the module/entity name, Right-Click and pick Refactor then Add port.

The new port/parameter is added to the declaration, and an empty connection to all of the instances.

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