Refactoring in the DVT Eclipse IDE - How to Rename a Port Across the Design Hierarchy

Description

This video explains how you can uniformly name a port which is directly propagated across several levels of the design, using Rename Port Across the Design Hierarchy refactoring.

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Transcript

Let's assume that you want to uniformly name a port which is directly propagated across several levels of the design.

Starting the Refactoring Process

Place the editor cursor on the port, right-click, and select Refactor > Rename Port Across the Design Hierarchy.

Fill in the new port name, and choose whether you want to perform the refactoring:

  • only in parent instances
  • only in sub-instances
  • or both ways.

Understanding the Renaming Process

When the operation is done in parent instances, for modules instantiated on multiple design hierarchy paths, renaming will follow only the hierarchical path of instances highlighted in yellow.

For every renamed port, both the declaration and all of its usages will be updated.

Using the Schematic Diagram Preview

To better understand the changes that are about to be performed, use the schematic diagram preview.

The diagram shows all the instances, ports, and port connections affected by the refactoring.

  • Instances reached from the refactoring starting point are colored in green.
  • Instances situated elsewhere in the design hierarchy, but affected by the refactoring, are colored in blue.
  • Instances where name conflicts are detected have an orange border, and all the conflicting ports or signals are also shown.

Handling Conflicts

In this example, the module already had a port with the new name.

The other conflict showed up because multiple ports of the module are tied to the same port of its parent via different instances.

When done previewing, click the Resume button on the Diagram Editor top bar to return to the Refactoring dialog.

To see a source code diff, click Preview.

Applying the Changes

When done, click OK to apply the changes.