Andrew Betts

What do you do when you have to perform risk analysis on a 20 year old circuit design and the information available consists of 30 vintage, undocumented VHDL files? (VHDL is a Hardware Description Language – an HDL).

In my case, a quick email not only provided the solution, it also restored my faith in human nature and the power of generosity and trust in business.

A couple of years ago, I was lucky enough to visit Amiq’s offices in Bucharest to stage a communication methodology course for their engineers. This took place in the theater on the top floor of their company building and I was impressed both by this charming location and the solidarity and self-reliance of the team. These are people that know how to solve problems, whether technical (e.g. advanced HDL-based Design & Verification) or logistic – navigating around the many obstacles to business in bureaucratic Romania, for example!

So, returning to my archaeological difficulties, I knew that Amiq’s DVT Eclipse IDE HDL editor worked by understanding a design in order to offer the designer relevant functions and choices. My mail to Amiq asked if it would also be useful for reverse-engineering existing code. Two hours later, I had an evaluation license installed on my machine at AEDVices and, indeed, the tool can produce excellent block diagrams, flow diagrams and schematics with the minimum of fuss. Just throw the files at it, basically.

Above all, the human experience was tremendously refreshing. No “it’s-a-free-evaluation-but-let’s-have-your-credit-card-details-anyway” nonsense. Not so much as a “how-likely-are-you-to-buy-a-lorry-load?”. Just a simple, “here-it-is; hope-you-like-it; call-us-if-you-need-help”.

I warmly recommend Amiq to anyone in the business of creating, verifying or trying to understand a design, for the quality of both the tool and the people that built it.