Ben Cohen

I strongly view the DVT Eclipse IDE as an essential element in the design and verification of complex designs; it is a well-integrated tool that not only allows correct-by-construction code per standard guidelines but provides users a very deep understanding of the design to facilitate debugging and communication.

What I loved about AMIQ EDA's DVT Eclipse IDE is that:

1. it is a well thought-out, mature set of integrated tools for creating SystemVerilog and VHDL designs and verification environments (particularly UVM) such that the project is correct by construction;
2. is supported by an in-depth structural and UML view of the architecture (including UVM and classes);
3. is supported by a smart editor that understand the structure of the language and the structure of the design, thus providing features such as smart templates, auto-complete with list of potential objects; the editor can beautify code and declutter the view of code by hiding bodies of structures that are irrelevant to debugging (e.g., modules, functions, always, tasks, etc); ease of global rename changes (e,g., signal / function / module) using refactoring;
4. automatically compiles code on the fly to detect coding errors;
5. automatically generates html documentation about all information needed for the design (e.g., modules, interfaces, assertions, classes, macros, packages, covergoups);
6. provides a smart SV linting including compliance to UVM best-use rules, and statistics about usage of sequences, assertions, coverage, and messaging).