Runtime UVM Elaboration in the DVT IDE for VS Code

Description

DVT IDE can perform an accurate UVM runtime elaboration.
This allows us to show the full verification hierarchy, taking into account for loops and factory overrides for example.
Dedicated views have been added.
The Factory Overrides View shows all the create calls affected by factory overrides.
The Config DB view presents all operations performed on the UVM Configuration Database via uvm_config_db set and get method calls.
The Registers View allows you to easily inspect register models: how registers are encapsulated in register blocks as well as detailed information about individual registers.
You can also interactively debug the runtime UVM elaboration in the DVT Debug Perspective.

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This video was shot using DVT 24.1.1

Transcript

DVT IDE can perform an accurate UVM runtime elaboration.

Running UVM Runtime Elaboration

From the command palette, run the Select Verification Top command. You can pick the test, specify the verbosity, and pass additional arguments as needed.

In the debug console, you can see the runtime output as the UVM elaboration phase is being executed. The runtime elaboration result is serialized.

In the top selection dialog, you can also pick one of the previously executed elaborations or a statically elaborated version of a test.

In the DVT IDE, the verification top provides a context for different functionalities, like the verification hierarchy, the UVM Component Diagrams, and more, as we'll see later.

Verification Hierarchy View

The Verification Hierarchy View now contains accurate elaboration information.

Take this env for example. UVM components created in for loops are now properly elaborated and displayed, and even better, DVT takes into account the factory overrides.

Notice, for example, how this component, although declared and created as a master_monitor, has a different type displayed in the view and an override decoration.

Factory Overrides View

You want to find out where this override comes from? Nothing easier. Just take a look at the Factory Overrides View.

Here you can see all the create calls affected by factory overrides, with detailed information such as the verification hierarchy to which the overrides are applicable, original and override type, including assistance for debugging complicated override chains.

ConfigDB View

The ConfigDB View presents all operations performed on the UVM configuration database via uvm_config_db::set and get method calls. Set and subsequent get calls for a specific configuration are clustered together.

Dedicated commands can assist even further, for example, to see the get calls corresponding to a particular set.

Registers View

The Registers View allows you to easily inspect register models, how registers are encapsulated in register blocks, as well as detailed information about individual registers, including their address and Bitfield diagram.

Interactive Debugging of UVM Runtime Elaboration

To interactively debug the runtime elaboration, just set some breakpoints, select a test, and switch to the Run and Debug view when prompted.

You can browse the function call stack, variable values, as well as all the breakpoints you've set in your project.

You can even add log points to get some extra printouts without altering the source code.

You can step through the executed code and inspect variable values, both in tooltips and in the Variables View.

This is just an overview. You can find more details in our documentation, and of course, you can always contact us for more information and technical support.