Michael Cochran

ASIC Design, Verification and Firmware Engineer |

Michael Cochran is an SOC/ASIC/FPGA verification engineer and EDA consultant with over 20 years of experience spanning the full spectrum of hardware development—from chip-level diagnostics and network performance analysis to providing leading-edge verification methodology at various companies, and now providing consulting services through Parsec EDA.

Mike currently consults with Amiq EDA, where he contributes to the development and testing of DVT IDE, Verissimo SystemVerilog Linter, and Specador Documentation Generator.

Mike holds a B.S. in Electrical Engineering from the University of Colorado and has technical expertise spanning SystemVerilog, SystemC, C/C++, Python and other assorted languages.

November 26th, 2025

SystemVerilog Macro Debugging and Refactoring: From Legacy Code to Maintainable Modern Design Patterns

Learn how to debug and refactor complex SystemVerilog macros. Examples and tools that help replace legacy code with more maintainable design patterns.