Tom Anderson
Adding an AI Assistant to a Hardware Language IDE
AI Assistant a new feature of our DVT IDE family that helps hardware engineers be even more productive when developing code for the design and verification of complex chips. The knowledge contained in LLMs, when combined with our own insight into the design and testbench, enables users to generate, modify, and understand code more easily.
Writing Better Code More Quickly with an IDE and Linting
Verissimo has caught some tricky variable bit width issues where a macro hid that only the lowest order bit was being compared. Both DVT IDE and Verissimo also save a lot of time. In the past, we found that when we wrote or edited code we spent too much time in a compile-debug-fix loop until it was clean. This happened hundreds, maybe thousands, of times on every project. With the ability to find and fix errors interactively within the IDE, that loop is significantly shorter. We get great team style alignment, with more efficient code reviews. So clearly we save many weeks of effort.
Three Key Aspects Of IP Quality
Functional correctness, robustness, and readability of IP are vital for high-quality, reusable designs.
Delivering Three Key Aspects of IP Quality
There are three main requirements to IP quality. The most obvious is functional correctness, another is IP robustness, and last but not least, IP maintainability. AMIQ EDA has products that help you meet such requirements.
11 Myths About Integrated Development Environments
IDEs were introduced to improve the efficiency and accuracy of writing and maintaining code, providing easier file navigation, hierarchical views of the project codebase, etc. However, myths have arisen about IDEs, and this article looks to clear the air.
e Language Users Deserve IDE Support Too
e has unique capabilities that keep it in active use, and IDE features for other languages are also available for e.
Extract Benefit from the Automated Refactoring of VHDL Code
VHDL users benefit greatly from DVT Eclipse IDE, with its deep insight into the language and its easy-to-use GUI.
How IDEs Enable the ‘shift left’ for VHDL
Checking VHDL coding errors on the fly and offering quick fix proposals is a shift left in the development process.
VHDL Users Also Deserve Efficient Design and Verification
Moving, tracing, and searching across multiple VHDL files helps when debugging errors or trying to understand a design.
Accelerate Your UVM Adoption and Usage with an IDE
The UVM Browser View is an intuitive entry point for exploring a UVM-based testbench, with elements grouped by categories.