ID
|
Message
|
SIGNAL_MULTIPLE_DRIVERS | Signal # has multiple drivers |
ILLEGAL_VARIABLE_ASSIGNMENTS | Variable # written by both continuous and procedural assignments |
ILLEGAL_VARIABLE_ASSIGNMENTS | Variable # written by more than one continuous assignment |
ILLEGAL_VARIABLE_ASSIGNMENTS | Variable # written in more than one always_comb/always_ff/always_latch block |
SENSITIVITY_MISSING | Missing # from sensitivity list |
SENSITIVITY_MIXED_CONTROL | Mixed edge/non-edge controls in sensitivity list may not be synthesizable |
ASSIGNMENT_BLOCKING | Blocking assignment of # in sequential logic (use non-blocking assignment) |
WIDTH_MISMATCH_PADDING | Assignment to #-bit value from #-bit value |
WIDTH_MISMATCH_PADDING | Returning # of #-bit type for function of #-bit return type |
WIDTH_MISMATCH_PADDING | Assignment to array element of #-bit type from # of #-bit type |
WIDTH_MISMATCH_ROUNDING | Assignment to #-bit value from #-bit value |
WIDTH_MISMATCH_ROUNDING | Returning # of #-bit type for function of #-bit return type |
WIDTH_MISMATCH_ROUNDING | Assignment to array element of #-bit type from # of #-bit type |
WIDTH_MISMATCH_TRUNCATION | Assignment to #-bit value from #-bit value |
WIDTH_MISMATCH_TRUNCATION | Returning # of #-bit type for function of #-bit return type |
WIDTH_MISMATCH_TRUNCATION | Assignment to array element of #-bit type from # of #-bit type |
WIDTH_MISMATCH_TRUNCATION | Integer literal # will be truncated to fit on # bits |
WIDTH_MISMATCH_IMPLICIT_SIGNAL | Assignment to # of #-bit type from # of #-bit type |
INTEGER_SIGN_OVERFLOW | Integer literal # on 32 bits has sign overflow |
UNDRIVEN_INPUT_PORT | Input port # is not driven |
PORT_CONNECTION | Cannot drive input port # |
PORT_CONNECTION | Output port # of module # connected to input port # of module # |
PORT_CONNECTION | Output port # of module # connected to # of reg data type" |
PORT_CONNECTION | Inout port # of module # connected to variable # |
SIGNAL_NOT_RESET | Signal # is not reset |
MULTIPLE_CLOCKS_BLOCK | Procedural block driven by multiple clocks (#) |
MULTIPLE_RESETS_BLOCK | Procedural block driven by multiple resets (#) |
MULTI_BIT_EDGE_CONTROL | Multi-bit signal # used as edge control |
OUTPUT_PORT_READ | Reading from an output port # is not recommended |
FEEDTHROUGH_DETECTED | Feedthrough from # to # |
INTERNAL_GENERATED_CLOCK | Clock signal # is not an input port |
INTERNAL_GENERATED_RESET | Reset signal # is not an input port |
IMPLICIT_DECLARATION | Implicit declaration of # using `default_nettype set to # |
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