DVT SystemVerilog IDE User Guide
Rev. 24.2.25, 31 October 2024

13.1 What is a project template?

A project template is a parameterized directory tree. Both in the file contents (.v, .sv, .sh, .e, .vhd, .txt - practically any file) and in the file or directory names you can use parameters.

Combined with TODO markers, you can use a project template as a customized wizard.

Parameters are IDs surrounded by double underscores (for example __pkg_prefix__) or by x_ and _x (for example x_pkg_prefix_x).

This convention allows you to edit the template like any other project using DVT in its full power - autocomplete, hyperlinks etc. Parameters are highlighted distinctively:

NOTE: It is not mandatory (but elegant) to use DVT for template creation. It is very elegant to apply the template using DVT.

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When you generate code using the project template, parameters are replaced in all files (including their names) with the values you specify:

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How to generate code from a project template

template-config.xml