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DVT VHDL IDE for VS Code User Guide
25.1.9 (13 May 2025)
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DVT VHDL IDE for VS Code User Guide
25.1.9 (13 May 2025)
  • Installation
    • System Requirements
    • Install DVT for VS Code from Marketplace
    • Install DVT for VS Code from VSIX
    • Install DVT for VS Code Using a Pre-Packed Distribution
    • Set the License
  • User Interface
    • VS Code User Interface
    • DVT IDE for VS Code User Interface
  • Predefined Projects
  • Project Templates
    • What is a project template?
    • How to generate code from a project template
    • Template Configuration
  • Build Configurations
    • Project Natures
    • Non-top files
    • default.build
    • Auto-config
    • Simulator Log-config
    • Emulating compiler invocations
    • Multiple .build Files
    • Compatibility Modes
    • Paths
    • Strings
    • Comments
    • Environment Variables
    • Including Other Argument Files
    • Build Persistence
    • All Build Directives
    • SystemVerilog OVM or UVM Library Compilation
    • Xilinx Libraries Compilation
    • Intel(Altera) Quartus Libraries Compilation
    • Questa Libraries Compilation
    • Use of External Programs
  • Compile Checks
    • Compile Waivers
    • Semantic Checks
    • Non Standard Checks
  • Quick Fix Proposals
  • AI Assistant
    • Overview
    • Getting Started
    • Key Terms
    • Working in Chat
    • Working in Editor
    • Code Completion
    • Protecting Code
    • Reference
    • Advanced LLM Configuration
    • How to Set-up Local LLMs Using Ollama
    • Troubleshooting
  • Content Assist (Autocomplete)
    • Content assist for CamelCase and Underscore
    • Code Templates
    • Component Automatic Instantiation
    • Generate Case Statement Using Autocomplete
  • Hyperlinks
  • Show Usages
  • Show Readers or Writers
  • Show Instances
  • Peek Exploration
  • Refactoring
  • Code Factory
  • Code Formatting
    • Capitalization
    • Whitespace
    • Indentation
    • Vertical Alignment
    • Line Wrapping
    • Disable Format for Code Sections
    • Preferences Keys
  • Breadcrumb Navigation Bar
    • Design Breadcrumb
    • Scope Breadcrumb
  • Diagrams
    • Design Diagram
    • Bit Field Diagrams
    • WaveDrom Timing Diagrams
    • Common Diagram Actions
    • Common Diagram Toolbar
  • Syntax Coloring
  • Inactive Generates Code Highlight
  • Database Out of Sync Notification
  • Tooltips
    • Comments Formatting
  • Workspace Symbols
  • Views
    • Problems View
    • Outline View
    • Compiled Files View
    • Compile Order View
    • Design Hierarchy View
    • Diagnostics View
  • Quick Search in Views
    • CamelCase
    • Simple Regex
    • Hierarchical Search
    • Search for Members
    • Search Port in Design Hierarchy
  • Content Filters
    • Content Filters XML syntax
    • Filtering by Element Type
    • Content Filters Examples
    • Predefined Content Filters
  • Export HTML/PDF Documentation
    • Preview HTML Documentation
  • External Tools Integration
  • Scripts
    • dvt_code.sh
    • dvt_ls.sh
  • Custom Scripts
  • SCM Checkout Hook
  • Memory Monitor
  • Application Notes
    • Flow Integration
    • Environment Variables
    • Design Elaboration
    • FPGA Support
    • Output and logging
    • Understanding DVT IDE memory usage
  • Handy VS Code Documentation Pointers
  • What is New?
  • How to Report an Issue?
  • Legal Notices
  • Third Party Licenses
  • Q & A
    • Can I deactivate DVT support for a workspace even though one of my workspace folders contains a .dvt directory?
    • Unable to write program user data
DVT VHDL IDE for VS Code User Guide
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Legal Notices

Legal Notices

Copyright (C) 2005-2025 AMIQ EDA s.r.l. (AMIQ). All rights reserved.

License: This product is licensed under the AMIQ’s End User License Agreement (EULA).

Trademarks: The trademarks, logos and service marks contained in this document are the property of AMIQ or other third parties. AMIQ™, DVT IDE™, Verissimo Linter™, Specador Documentation Generator™ are trademarks of AMIQ. Eclipse™ and Eclipse Ready™ are trademarks of Eclipse Foundation, Inc. All other trademarks are the property of their respective holders.

Restricted Permission: This publication is protected by copyright law. AMIQ grants permission to print hard copy of this publication subject to the following conditions:

  1. The publication may not be modified in any way.

  2. Any authorized copy of the publication or portion thereof must include all original copyright, trademark, and other proprietary notices and this permission statement.

Disclaimer: This publication is for information and instruction purposes. AMIQ reserves the right to make changes in specifications and other information contained in this publication without prior notice. The information in this publication is provided as is and does not represent a commitment on the part of AMIQ. AMIQ does not make, and expressly disclaims, any representations or warranties as to the completeness, accuracy, or usefulness of the information contained in this document. The terms and conditions governing the sale and licensing of AMIQ products are set forth in written agreements between AMIQ and its customers. No representation or other affirmation or fact contained in this publication shall be deemed to be a warranty or give rise to any liability of AMIQ whatsoever.

How to Report an Issue?
Third Party Licenses

© 2005-2025 AMIQ EDA s.r.l. (AMIQ). All rights reserved. DVT 25.1.9 (13 May 2025). Built with Sphinx 8.1.3