Compatibility Modes
A compatibility mode defines how DVT decides what top files to parse and with what language syntax to parse them.
- File Extension to Language Syntax Mapping
File extensions can be mapped either to a specific language syntax or skipped (that is they will not be parsed).
Each mode has a default file extension to syntax mapping.
You control the extensions mapping by using various directives, like for example
+verilog2001extin vcs.vlogan Compatibility Mode.The
+dvt_ext_unmap_alldirective clears the syntax mapping, including skipped. This means that all top files will be parsed using the Language Syntax for Unmapped Extensions. Note that the syntax for unmapped extensions can be Skip, for example in the Default DVT Compatibility Mode, as a result nothing will be compiled.- Language Syntax for Unmapped Extensions
An unmapped top file will be parsed using this syntax or skipped, depending on the compatibility mode. Can be controlled by various directives, like for example
+dvt_ext_unmapped_syntax+<syntax>in the Default DVT Compatibility Mode or+v2kin vcs.vlogan Compatibility Mode.- Language Syntax for Included Files
Where relevant, for example for Verilog/SystemVerilog, the included files are parsed either with the same syntax as the including file, or as specified by the extension mapping. See also each compatibility mode documentation.
Note
A compatibility mode might also introduce specific predefined API, like for example Verilog preprocessing macros.
List of Compatibility Modes
The following compatibility modes are supported:
dvt - This is the default mode.
How to Specify the Compatibility Mode
The +dvt_init+<mode> directive changes the compatibility mode, where <mode> can be any of the above modes.
A +dvt_init+<mode> directive:
Resets the dvt builder to the mode specific default state.
Clears all the previous directives (preprocessing defines, system variables, libraries, etc.).
You can see it as the equivalent of a new tool invocation.
You may specify any number of +dvt_init directives inside a build file.
The compatibility mode is enforced until the next +dvt_init directive.
Default DVT Compatibility Mode
The +dvt_init+dvt directive resets the builder to the dvt default state.
- Language Syntax for Unmapped Extensions:
Skip unmapped extensions.
- Language Syntax for Included Files:
Included files are parsed as specified by the extension mapping.
Specifying a <syntax>
To specify the <syntax> for the directives above, one should use any of the following strings, case-insensitive:
1364-1995, Verilog_95
1364-2001-noconfig, Verilog_2001_noconfig
1364-2001, Verilog_2001
1364-2005, Verilog_2005
VAMS-2.3, Verilog_AMS_23
1800-2005, SystemVerilog_2005
1800-2009, SystemVerilog_2009
1800-2012, SystemVerilog_2012, SystemVerilog
SVAMS, SystemVerilog_AMS
1647-2011, e_2011, e
1076-1987, VHDL_87
1076-1993, VHDL_93
1076.1-1999, VHDL_AMS_99
1076-2000, VHDL_2000
1076-2002, VHDL_2002
1076.1-2007, VHDL_AMS_2007
1076-2008, VHDL_2008, VHDL
PSS
SKIP
The dot (.) for specifying <ext> is optional. For example +dvt_ext_map+verilog_1364_1995+.svh and +dvt_ext_map+verilog_1364_1995+svh are equivalent.
You can specify more extensions at once, for example +dvt_ext_map+verilog_1364_1995+.svh+svp.
When several directives change the syntax of a specific <ext>, the last one wins.
Examples
+dvt_init+dvt // By default .c are skipped and .v are parsed with Verilog 2001 syntax
+dvt_ext_map+SystemVerilog_2012+.v+.c // Now .c and .v are parsed with SystemVerilog 2012
Note
Every time you re-map an already mapped extension, DVT will warn you. For the example above, you get the following warnings:
.v was previously mapped to Verilog_2001
.c was previously mapped to Skip
+dvt_init+dvt // By default .vp is parsed with SystemVerilog 2012.
+dvt_ext_unmap+.vp // Because by default the unmapped extensions are skipped, .vp files will be skipped
+dvt_init+dvt // By default the unmapped extensions are skipped
+dvt_ext_unmapped_syntax+Verilog_95 // Now unmapped extensions, for example .foo, will be parsed as Verilog 95
+dvt_init+dvt
+dvt_ext_unmap_all // All files are skipped
+dvt_ext_unmapped_syntax+Verilog_95 // Compile all files with unmapped extensions as Verilog 95
+dvt_ext_map+skip+.cpp // Skip .cpp files
+dvt_ext_map+SystemVerilog_95+.sv // Compile .sv as SystemVerilog
+dvt_ext_map+VHDL_1076_1_1999+.vhd // Compile .vhd as VHDL-AMS
gcc Compatibility Mode
The +dvt_init+gcc directive resets the builder to the gcc default state.
Syntax |
Extensions |
C/C++ |
.c, .i, .ii, .h, .cc, .cp, .cxx, .cpp, .CPP, .c++, .C, .hh, .H, .hp, .hxx, .hpp, .HPP, .h++, .tcc |
- Language Syntax for Unmapped Extensions:
Skip unmapped extensions.
When you compile C/C++ code using gcc rather than the simulator, for each gcc invocation it is recommended to use a +dvt_init+gcc directive followed by the gcc command line arguments.
ius.irun Compatibility Mode
The +dvt_init+ius.irun directive resets the builder to the ius.irun default state.
- Language Syntax for Unmapped Extensions:
Skip
- Language Syntax for Included Files:
Included files are parsed using the syntax that was used for parsing the including file.
Note
In IUS compatibility mode all directives are case-insensitive except for -f / -F.
Note
In IUS compatibility mode, top and test files specified using relative paths are solved, in order, as relative to the compilation root, then $SPECMAN_PATH entries.
INCA |
Defined as preprocessing macro without value. |
Examples
+dvt_init+ius.irun // By default .c are skipped and .v are parsed with Verilog 2001 syntax
-sysv_ext +.v,.c // Now .c and .v are parsed with SystemVerilog 2012; however, the default extensions mapped to SystemVerilog 2012 still stand, including .sv
Note
Every time you re-map an already mapped extension, DVT will warn you. For the example above, you get the following warnings:
.v was previously mapped to Verilog_2001
.c was previously mapped to Skip
+dvt_init+ius.irun // By default .vp, .v, .vs are parsed with Verilog 2001
-vlog_ext .v, .vs // We override the mapping for Verilog 2001 with only the other two extensions.
// Now .vp is not mapped to any Language Syntax.
// Because by default the unmapped extensions are skipped, .vp files will be skipped
+dvt_init+ius.irun // By default the unmapped extensions are skipped
-default_ext verilog95 // Now unmapped extensions, for example .foo, will be parsed as Verilog 95
+dvt_init+ius.irun
-default_ext systemverilog // All files with unmapped extensions are parsed as SystemVerilog
-sv // All Verilog source files are parsed with SystemVerilog
-v200x // All VHDL source files are parsed with VHDL 2008
ius.perspec Compatibility Mode
The +dvt_init+ius.perspec directive resets the builder to the ius.perspec default state.
Syntax |
Extensions |
SLN |
.sln |
PSS |
.pss |
e Language 1647-2011 |
.e |
- Language Syntax for Unmapped Extensions:
Skip unmapped extensions.
questa.vcom Compatibility Mode
The +dvt_init+questa.vcom directive resets the builder to the questa.vcom default state.
- Language Syntax for Unmapped Extensions:
VHDL 1076-2002
QUESTA |
Defined as preprocessing macro without value. |
MODEL_TECH |
Defined as preprocessing macro without value. |
questa.vlog Compatibility Mode
The +dvt_init+questa.vlog directive resets the builder to the questa.vlog default state.
Syntax |
Extensions |
System Verilog 1800-2012 |
.sv, .svp, .svh |
C/C++ |
.c, .cpp, .cc, .cxx |
- Language Syntax for Unmapped Extensions:
Verilog 1995
- Language Syntax for Included Files:
Included files are parsed using the syntax that was used for parsing the including file.
QUESTA |
Defined as preprocessing macro without value. |
MODEL_TECH |
Defined as preprocessing macro without value. |
questa.qrun Compatibility Mode
The +dvt_init+questa.qrun directive resets the builder to the questa.qrun default state.
Syntax |
Extensions |
Verilog 1995 |
.v95, .v95p |
Verilog 2001 |
.v, .vp, .vs |
System Verilog 1800-2012 |
.sv, .svp, .svi, .svh, .vlib, .vcfg, .pslvlog |
VHDL 1987 |
.vhd, .vhdl, .vhdp, .vhdlp |
VHDL 2008 |
.pslvhdl, .vhcfg |
C/c++ |
.c, .h, .cc, .cpp, .cxx |
- Language Syntax for Unmapped Extensions:
Skip
- Language Syntax for Included Files:
Included files are parsed using the syntax that was used for parsing the including file.
QUESTA |
Defined as preprocessing macro without value. |
MODEL_TECH |
Defined as preprocessing macro without value. |
vcs.vhdlan Compatibility Mode
The +dvt_init+vcs.vhdlan directive resets the builder to the vcs.vhdlan default state.
Syntax |
Extensions |
C/C++ |
.c, .h, .cpp, .cc, .cxx |
Shared objects (C/C++ libraries) |
.so, .a, .o |
- Language Syntax for Unmapped Extensions:
VHDL 1076-1993
vcs.vlogan Compatibility Mode
The +dvt_init+vcs.vlogan directive resets the builder to the vcs.vlogan default state.
Syntax |
Extensions |
C/C++ |
.c, .cpp, .cc, .cxx |
Shared objects (C/C++ libraries) |
.so, .a, .o |
- Language Syntax for Unmapped Extensions:
Verilog 1995
- Language Syntax for Included Files:
Included files are parsed using the syntax that was used for parsing the including file.
The dot (.) for specifying <ext> is optional. For example +verilog1995ext+.svh and +verilog1995ext+svh are equivalent.
You can specify more extensions at once, for example +verilog1995ext+.svh+svp.
When several directives change the syntax of a specific <ext>, the last one wins.
ntb_opts [ uvm / uvm-1.0 / uvm-1.1 / uvm-1.2 ]
Typical use-case #1 - single vcs command
Command:
vcs -ntb_opts uvm top1.sv top2.sv [other compilation directives]
Build config:
// The UVM library is compiled from $VCS_UVM_HOME or $VCS_HOME/etc/uvm or $DVT_UVM_HOME
// (in this order of precedence, depending on which environment variables are defined).
+dvt_init+vcs.vlogan -ntb_opts uvm top_file1.sv top_file2.sv [other compilation directives]
Typical use-case #2 - multiple vlogan commands
Commands:
vlogan -ntb_opts uvm
vlogan -ntb_opts uvm top1.sv top2.sv [other compilation directives]
vlogan -ntb_opts uvm top3.sv top4.sv [other compilation directives]
Build config:
// The UVM library is compiled from $VCS_UVM_HOME or $VCS_HOME/etc/uvm or $DVT_UVM_HOME
// (in this order of precedence, depending on which environment variables are defined).
+dvt_init+vcs.vlogan -ntb_opts uvm
// The UVM library is not recompiled. It is "referenced" by adding the relevant incdirs.
+dvt_init+vcs.vlogan -ntb_opts uvm top1.sv top2.sv [other compilation directives]
// The UVM library is not recompiled. It is "referenced" by adding the relevant incdirs.
+dvt_init+vcs.vlogan -ntb_opts uvm top3.sv top4.sv [other compilation directives]
Note
In the invocations which “references” the UVM library (rows 7-10 in the table below) - ntb_opts uvm is equivalent with:
+incdir+<VCS>/wrap
+incdir+<UVM>/src
and any `include uvm_pkg.sv will solve to <VCS>/wrap/uvm_pkg.sv which contains the following code:
`ifndef WRAP_UVM_PKG_SV
`define WRAP_UVM_PKG_SV
`include "uvm_macros.svh"
import uvm_pkg::*;
`endif
Note
The second, third, … ntb_opts uvm invocations without top files (rows 4-6 in the table below) will take into account the dvt_disable_uvm_reuse directive.
Details
The effect of this directive in a particular invocation depends on the following factors:
if it’s the first invocation which specifies -ntb_opts uvm
if the invocation specifies source files to be compiled (top files) in addition to the -ntb_opts uvm flag
if $VCS_UVM_HOME / $VCS_HOME environment variables are set
# |
First |
Top files |
$VCS_UVM_HOME |
$VCS_HOME |
Equivalent incdir(s) |
Equivalent top file |
|
Y |
— |
Y |
— |
$VCS_UVM_HOME |
$VCS_UVM_HOME/uvm_pkg.sv |
|
Y |
— |
N |
Y |
$VCS_HOME/etc/uvm[ -version ]/src |
$VCS_HOME/etc/uvm[ -version ]/src/uvm_pkg.sv |
|
Y |
— |
N |
N |
$DVT_UVM_HOME/src |
$DVT_UVM_HOME/src/uvm_pkg.sv |
|
N |
N |
Y |
— |
$VCS_UVM_HOME |
$VCS_UVM_HOME/uvm_pkg.sv |
|
N |
N |
N |
Y |
$VCS_HOME/etc/uvm[ -version ]/src |
$VCS_HOME/etc/uvm[ -version ]/src/uvm_pkg.sv |
|
N |
N |
N |
N |
$DVT_UVM_HOME/src |
$DVT_UVM_HOME/src/uvm_pkg.sv |
|
N |
Y |
Y |
Y |
$VCS_HOME/etc/uvm/vcs/wrap
$VCS_UVM_HOME
|
|
|
N |
Y |
Y |
N |
$DVT_HOME/predefined_projects/libs/uvm/vcs/wrap
$VCS_UVM_HOME
|
|
|
N |
Y |
N |
Y |
$VCS_HOME/etc/uvm/vcs/wrap
$VCS_HOME/etc/uvm[ -version ]/src
|
|
|
N |
Y |
N |
N |
$DVT_HOME/predefined_projects/libs/uvm/vcs/wrap
$DVT_UVM_HOME/src
|
Note
If $DVT_UVM_HOME is not defined, falls back to $DVT_HOME/predefined_projects/libs/uvm-1.2.
VCS |
Defined as preprocessing macro without value. |
xcelium.xrun Compatibility Mode
The +dvt_init+xcelium.xrun directive resets the builder to the xcelium.xrun default state.
- Language Syntax for Unmapped Extensions:
Skip
- Language Syntax for Included Files:
Included files are parsed using the syntax that was used for parsing the including file.
Note
In XCELIUM compatibility mode all directives are case-insensitive except for -f / -F.
Note
In XCELIUM compatibility mode, top and test files specified using relative paths are solved, in order, as relative to the compilation root, then $SPECMAN_PATH entries.
How to specify <syntax> for - default_ext <syntax> and - <syntax>_ext directives
Language Syntax |
- default_ext <syntax> |
- <syntax>_ext |
Verilog 2001 |
-default_ext verilog |
-vlog_ext |
Verilog 1995 |
-default_ext verilog95 |
N/A |
SystemVerilog 2012 |
-default_ext systemverilog, -default_ext vcnf |
-sysv_ext |
VHDL 1987 |
-default_ext vhdl, -default_ext vhcfg |
-vhdl_ext |
e Language |
-default_ext e |
-e_ext |
VHDL AMS 1999 |
-default_ext vhdl-ams |
-amsvhdl_ext |
SKIP |
-default_ext verilog-ams, -default_ext psl_vlog,
-default_ext psl_vhdl, -default_ext psl_sc, -default_ext c,
-default_ext cpp, -default_ext assembly, -default_ext o,
-default_ext a, -default_ext so, -default_ext scs
|
-a_ext, -amsvhdl_ext, -amsvlog_ext,
-as_ext, -c_ext, -cpp_ext,
-dynlib_ext, -e_ext, -o_ext,
-spice_ext, -sysv_ext, -vhcfg_ext, -vhdl_ext
|
INCA |
Defined as preprocessing macro without value. |
XCELIUM |
Defined as preprocessing macro without value. |
Examples
+dvt_init+xcelium.xrun // By default .c are skipped and .v are parsed with Verilog 2001 syntax
-sysv_ext +.v,.c // Now .c and .v are parsed with SystemVerilog 2012; however, the default extensions mapped to SystemVerilog 2012 still stand, including .sv
Note
Every time you re-map an already mapped extension, DVT will warn you. For the example above, you get the following warnings:
.v was previously mapped to Verilog_2001
.c was previously mapped to Skip
+dvt_init+xcelium.xrun // By default .vp, .v, .vs are parsed with Verilog 2001
-vlog_ext .v, .vs // We override the mapping for Verilog 2001 with only the other two extensions.
// Now .vp is not mapped to any Language Syntax.
// Because by default the unmapped extensions are skipped, .vp files will be skipped
+dvt_init+xcelium.xrun // By default the unmapped extensions are skipped
-default_ext verilog95 // Now unmapped extensions, for example .foo, will be parsed as Verilog 95
+dvt_init+xcelium.xrun
-default_ext systemverilog // All files with unmapped extensions are parsed as SystemVerilog
-sv // All Verilog source files are parsed with SystemVerilog
-v200x // All VHDL source files are parsed with VHDL 2008