Skip to content
DVT SystemVerilog IDE for VS Code User Guide
25.1.9 (13 May 2025)
⌘ K
DVT SystemVerilog IDE for VS Code User Guide
25.1.9 (13 May 2025)
  • Installation
    • System Requirements
    • Install DVT for VS Code from Marketplace
    • Install DVT for VS Code from VSIX
    • Install DVT for VS Code Using a Pre-Packed Distribution
    • Set the License
  • User Interface
    • VS Code User Interface
    • DVT IDE for VS Code User Interface
  • Predefined Projects
  • Project Templates
    • What is a project template?
    • How to generate code from a project template
    • Template Configuration
  • Build Configurations
    • Project Natures
    • Non-top files
    • default.build
    • Auto-config
    • Simulator Log-config
    • Emulating compiler invocations
    • Multiple .build Files
    • Compatibility Modes
    • Paths
    • Strings
    • Comments
    • Environment Variables
    • Including Other Argument Files
    • Build Persistence
    • All Build Directives
    • SystemVerilog OVM or UVM Library Compilation
    • Xilinx Libraries Compilation
    • Intel(Altera) Quartus Libraries Compilation
    • Questa Libraries Compilation
    • Use of External Programs
  • Compile Checks
    • Compile Waivers
    • Semantic Checks
    • Synthesis Checks
    • Performance Checks
    • Dead Code Checks
    • Non Standard Checks
  • Quick Fix Proposals
  • AI Assistant
    • Overview
    • Getting Started
    • Key Terms
    • Working in Chat
    • Working in Editor
    • Code Completion
    • Protecting Code
    • Reference
    • Advanced LLM Configuration
    • How to Set-up Local LLMs Using Ollama
    • Troubleshooting
  • Content Assist (Autocomplete)
    • Content assist for CamelCase and Underscore
    • Code Templates
    • Module Automatic Instantiation
    • Override Functions Using Autocomplete
    • Override Constraints Using Autocomplete
    • Implement Extern Functions Using Autocomplete
    • Generate Setters and Getters Using Autocomplete
    • Use Assignment Pattern for Struct Type Variable
  • Hyperlinks
  • Show Usages
  • Show Readers or Writers
  • Show Call Hierarchy
  • Show Type Hierarchy
  • Show Constraints
  • Show Instances
  • Peek Exploration
  • Refactoring
  • Override Functions
    • Override Annotation
    • Override Using Command Palette
    • Override Using Autocomplete
  • Override Constraints
    • Override Annotation
    • Override Using Command Palette
    • Override Using Autocomplete
  • Generate Setters and Getters
  • Code Factory
  • Code Formatting
    • Whitespace
    • Indentation
    • Vertical Alignment
    • Line Wrapping
    • Disable Format for Code Sections
    • Preferences Keys
  • Breadcrumb Navigation Bar
    • Design Breadcrumb
    • Verification Breadcrumb
    • Scope Breadcrumb
  • Diagrams
    • UML Diagrams
    • Design Diagram
    • UVM Components Diagrams
    • WaveDrom Timing Diagrams
    • Bit Field Diagrams
    • Common Diagram Actions
    • Common Diagram Toolbar
  • Syntax Coloring
  • Tooltips
    • Comments Formatting
  • Workspace Symbols
  • Views
    • Compile Order View
    • Compiled Files View
    • Config DB View
    • Design Hierarchy View
    • Diagnostics View
    • Factory Overrides View
    • Outline View
    • Problems View
    • Registers View
    • Verification Hierarchy View
  • Quick Search in Views
    • CamelCase
    • Simple Regex
    • Hierarchical Search
    • Search for Members
    • Search Port in Design Hierarchy
    • Search Port in Verification Hierarchy
  • Content Filters
    • Content Filters XML syntax
    • Filtering by Element Type
    • Content Filters Examples
    • Predefined Content Filters
  • Macros Support
    • Inactive Code Highlight
    • Macro Expansion
  • Inactive Generates Code Highlight
  • Database Out of Sync Notification
  • Export HTML/PDF Documentation
    • Preview HTML Documentation
  • External Tools Integration
  • UVM Support
    • UVM Runtime Elaboration
    • Runtime UVM Configuration Queries
    • UVM Content Filters
    • UVM Field Editor
    • UVM Sequence Tree
    • UVM Templates
    • UVM Verification Hierarchy
  • Scripts
    • dvt_code.sh
    • dvt_ls.sh
  • Custom Scripts
  • SCM Checkout Hook
  • Memory Monitor
  • Application Notes
    • Flow Integration
    • Environment Variables
    • Design Elaboration
    • Compilation Speed-up
    • Precompilation Support
    • Encrypted VIP Support
    • FPGA Support
    • Preprocessed Files Support
    • Output and logging
    • Understanding DVT IDE memory usage
  • Handy VS Code Documentation Pointers
  • What is New?
  • How to Report an Issue?
  • Legal Notices
  • Third Party Licenses
  • Q & A
    • Can I deactivate DVT support for a workspace even though one of my workspace folders contains a .dvt directory?
    • Unable to write program user data
DVT SystemVerilog IDE for VS Code User Guide
/
Hyperlinks

Hyperlinks

Hyperlinks are available for all classes, modules, methods, fields, signals, macros, etc. in the source code files that DVT analyzes in your project.

Go to Declaration

Place editor cursor over an identifier and use the Go to Declaration command to go to the declaration of the element.

../../_images/open_declaration.gif

Go to Definition

Place editor cursor over an identifier while holding down Ctrl. The identifier becomes a hyperlink, which jumps to the definition of the element.

You can also use the Go to Definition command.

../../_images/open_definition.gif

Go to Type definition

Place editor cursor over an identifier and use the Go to Type Definition command to go to the type definition of the element.

../../_images/open_type.gif

Jump to Assignment

Place cursor on a signal and use the DVT: Jump to Assignment command to jump to its next assignment.

../../_images/jump_to_assignment.gif

Open Design Breadcrumb Instance

Available only for a design element under cursor which is instantiable.

Place editor cursor over an element and use the DVT: Open Design Breadcrumb Instance command to jump to the corresponding instance from design.

../../_images/open_instance.gif

Hyperlinks in Comments

You can define hyperlinks in comments using the @link or @see pragmas, for example:

// @link uvm_pkg::run_test
// For more details @see spi_if.miso and @see spi_if.mosi

Hover the hierarchical id specified after the pragma with the mouse cursor while holding down Ctrl and Click to go to the element’s declaration.

The hierarchical identifier following @link or @see is of the form:

[<package_name>::<type_name>.<inner_type_name>.]<element_name>

where <element_name> must be a type (class, struct, module, entity, interface, etc.) or a type member (method, field, event, signal, port etc.).

../../_images/hyperlinks_in_comments.gif

Go to Super Implementation

Place editor cursor on a method name and use the DVT: Go to Super Implementation command to open the implementation of the overridden method.

../../_images/open_super_implementation.gif

Go to Child Implementation

Place editor cursor on a method name and use the DVT: Go to Child Implementation command to open the implementations which override the method.

../../_images/open_super_child_implementation.gif

Jump to an Imported File

Place the mouse cursor over an imported file while holding down Ctrl. The identifier becomes a hyperlink, which jumps to the file.

../../_images/jump_to_an_imported_file.gif

Jump to a Macro Definition

Place the mouse cursor on a macro while holding down Ctrl. The identifier becomes a hyperlink, which jumps to the macro definition.

../../_images/jump_to_a_macro_definition.gif

Show Connected TLM Ports

Place the mouse cursor over a TLM port and use the DVT: Show Connected TLM Ports command.

../../_images/vscode_show_TLM_connections.gif

Show in Config DB View

Place the editor cursor on a UVM Config DB set() or get() function call and use the DVT: Show in Config DB View command.

Note

You need to perform UVM Runtime Elaboration in order to populate the Config DB View.

../../_images/vscode_show_in_configDB.gif

Show Associated Getters in Config DB View

Place the editor cursor on a UVM Config DB set() function call and use the DVT: Show Associated Getters in Config DB View command.

Note

You need to perform UVM Runtime Elaboration in order to populate the Config DB View.

../../_images/vscode_show_associated_getters.gif

Show Associated Setter in Config DB View

Place the editor cursor on a UVM Config DB get() function call and use the DVT: Show Associated Setter in Config DB View command.

Note

You need to perform UVM Runtime Elaboration in order to populate the Config DB View.

../../_images/vscode_show_associated_setter.gif

Show in Factory Overrides View

Place the editor cursor on a UVM factory override function call and use the DVT: Show in Factory Overrides View command.

Note

You need to perform UVM Runtime Elaboration in order to populate the Factory Overrides View.

../../_images/vscode_show_in_factory_overrides.gif

Show in Registers View

Place the editor cursor on a UVM register and use the DVT: Show in Registers View command.

Note

You need to perform UVM Runtime Elaboration in order to populate the Registers View.

../../_images/vscode_show_in_registers.gif
Use Assignment Pattern for Struct Type Variable
Show Usages

On this page

  • Go to Declaration
  • Go to Definition
  • Go to Type definition
  • Jump to Assignment
  • Open Design Breadcrumb Instance
  • Hyperlinks in Comments
  • Go to Super Implementation
  • Go to Child Implementation
  • Jump to an Imported File
  • Jump to a Macro Definition
  • Show Connected TLM Ports
  • Show in Config DB View
  • Show Associated Getters in Config DB View
  • Show Associated Setter in Config DB View
  • Show in Factory Overrides View
  • Show in Registers View

© 2005-2025 AMIQ EDA s.r.l. (AMIQ). All rights reserved. DVT 25.1.9 (13 May 2025). Built with Sphinx 8.1.3