Module ip_emac_top

pi_emac_resetlogicpi_emac_ref_clocklogicpi_emac_tx_clocklogicpi_emac_tx_collogicpi_emac_tx_crslogicpi_emac_rx_clocklogicpi_emac_rx_dvlogicpi_emac_rx_errlogicpi_emac_rx_data[7:0]logicpi_emac_host_clocklogicpi_emac_base_address[23:0]logicpi_emac_host_sdata[31:0]logicpi_emac_host_sdvalogicpi_emac_host_serrlogicpi_emac_config_mcmd[1:0]logicpi_emac_config_maddr[31:0]logicpi_emac_config_mdata[31:0]logicpi_emac_mdio_clocklogicpi_emac_master_mdiologicpi_mac_test_enlogicpi_mac_scan_enlogicpi_mac_scan_inlogicpi_bistmode_enlogicpo_emac_gtx_clocklogicpo_emac_tx_enlogicpo_emac_tx_errlogicpo_emac_tx_datalogic[7:0]po_emac_host_mcmdlogic[1:0]po_emac_host_maddrlogic[31:0]po_emac_host_mdatalogic[31:0]po_emac_host_mlastlogicpo_emac_config_sdatalogic[31:0]po_emac_config_sdvalogicpo_emac_config_serrlogicpo_host_intlogicpo_emac_mdio_clocklogicpo_emac_master_mdiologicpo_emac_master_onilogicpo_mac_scan_outlogic

Block Diagram of ip_emac_top

Ports

Name

Type

Direction

Description
pi_emac_reset

wire logic

input

Global Hardware reset (active low)
pi_emac_ref_clock

wire logic

input

GMII 125 MHz reference clock
pi_emac_tx_clock

wire logic

input

Transmit GMII/MII interface Transmit MII 25/2.5 MHz clock (from PHY)
po_emac_gtx_clock

wire logic

output

Transmit GMII 125 MHz clock (to PHY)
po_emac_tx_en

wire logic

output

Transmit MII/GMII enable indication (to PHY)
po_emac_tx_err

wire logic

output

Transmit MII/GMII error indication (to PHY)
po_emac_tx_data

wire logic [7 : 0]

output

Transmit MII/GMII data (MII data is po_emac_tx_data[3:0]) (to PHY)
pi_emac_tx_col

wire logic

input

Collision indication (from PHY)
pi_emac_tx_crs

wire logic

input

Carrier Sense indication (from PHY)
pi_emac_rx_clock

wire logic

input

Receive GMII/MII interface Receive GMII/MII 125/25/2.5 MHz clock (from PHY)
pi_emac_rx_dv

wire logic

input

Receive MII/GMII data valid indication (from PHY)
pi_emac_rx_err

wire logic

input

Receive MII/GMII error indication (from PHY)
pi_emac_rx_data

wire logic [7 : 0]

input

Receive MII/GMII data (MII data is pi_emac_rx_data[3:0]) (from PHY)
pi_emac_host_clock

wire logic

input

HOST interface (common)
pi_emac_base_address

wire logic [23 : 0]

input

host data interface
po_emac_host_mcmd

wire logic [1 : 0]

output
po_emac_host_maddr

wire logic [31 : 0]

output
po_emac_host_mdata

wire logic [31 : 0]

output
po_emac_host_mlast

wire logic

output
pi_emac_host_sdata

wire logic [31 : 0]

input
pi_emac_host_sdva

wire logic

input
pi_emac_host_serr

wire logic

input
pi_emac_config_mcmd

wire logic [1 : 0]

input

host config interface
pi_emac_config_maddr

wire logic [31 : 0]

input
pi_emac_config_mdata

wire logic [31 : 0]

input
po_emac_config_sdata

wire logic [31 : 0]

output

pi_emac_config_mlast ,
po_emac_config_sdva

wire logic

output
po_emac_config_serr

wire logic

output
po_host_int

wire logic

output

general interrupt to host
pi_emac_mdio_clock

wire logic

input

MDIO interface
po_emac_mdio_clock

wire logic

output
pi_emac_master_mdio

wire logic

input
po_emac_master_mdio

wire logic

output
po_emac_master_oni

wire logic

output
pi_mac_test_en

wire logic

input

Test and Scan interface signals

pi_mac_scan_en

wire logic

input
pi_mac_scan_in

wire logic

input
po_mac_scan_out

wire logic

output
pi_bistmode_en

wire logic

input

Submodules

host_clk_mng (ip_host_clk_mng_g) pi_reset pi_sw_reset pi_gate_en po_host_reset po_host_hw_rst pi_power_off pi_host_clock pi_host_clock_en po_host_clock_f po_host_clock_g pi_test_en host_if (ip_mac_hostif_top) pi_reset pi_clock_f pi_rx_clock pi_rxds_clock pi_tx_clock pi_txds_clock pi_tx1_clock po_rx_clock_en po_rxds_clock_en po_tx_clock_en po_txds_clock_en po_tx1_clock_en po_host_mcmd po_host_maddr po_host_mdata po_host_mlast pi_host_sdata pi_host_sdva po_rx_enable_rd pi_rx_empty pi_rx_last_rd pi_rx_data pi_rx_sof pi_rx_eof po_tx_enable_wr pi_tx_full pi_tx_last_wr po_tx_data po_tx_be po_tx_sof po_tx_eof po_tx_err po_tx_put_crc po_tx_put_padding po_tx_upd_read pi_tx_upd_empty pi_tx_upd_last pi_tx_upd_data pi_regs_csr0_tap pi_regs_csr0_ape pi_regs_csr0_bar pi_regs_csr14_swr pi_regs_csr1_tpd pi_regs_csr2_rpd pi_regs_csr3_stl pi_regs_csr4_srl po_regs_csr5_rwt po_regs_csr5_unf po_regs_csr5_ovf po_regs_csr5_ru po_regs_csr5_tu po_regs_csr5_ri po_regs_csr5_ti po_regs_csr5_tjt pi_regs_csr14_st pi_regs_csr14_sr pi_global_cfda_slm pi_global_cfda_szm pi_config_burst_size pi_config_ds_offset mac_top (ip_mac_top_g) pi_emac_reset pi_emac_sw_reset pi_emac_ref_clock pi_emac_gate_en pi_emac_power_off po_host_tx_idone po_host_rx_idone pi_emac_tx_clock po_emac_gtx_clock po_emac_tx_en po_emac_tx_err po_emac_tx_data pi_emac_tx_col pi_emac_tx_crs pi_emac_rx_clock pi_emac_rx_dv pi_emac_rx_err pi_emac_rx_data pi_host_clock pi_host_stat_read po_host_stat_empty po_host_stat_last po_host_stat_data pi_host_enable_wr po_host_full_wr po_host_last_wr pi_host_data_wr pi_host_byte_wr pi_host_start_wr pi_host_end_wr pi_host_error_wr pi_host_pad_wr pi_host_crc_wr pi_host_wakeup pi_host_wr_data pi_host_wr_setup pi_host_enable_rd po_host_empty_rd po_host_last_rd po_host_data_rd po_host_byte_rd po_host_start_rd po_host_end_rd po_host_error_rd po_host_stop_xmit pi_host_stop_xmit po_host_stop_rcv pi_host_stop_rcv pi_emac_gigabit pi_emac_half_dplx pi_emac_xoff_value pi_emac_xon_value pi_emac_col_limit pi_emac_tx_fc_en pi_emac_burst_lim pi_emac_burst_en pi_emac_ifg_cfg_1 pi_emac_ifg_cfg_2 pi_emac_store_fwd pi_emac_threshold pi_emac_rx_fc_en pi_emac_hash_nfix pi_emac_inverse pi_emac_multicast pi_emac_pass_multi pi_emac_promisc pi_emac_pass_all pi_emac_high_thrs pi_emac_low_thrs pi_emac_loopback pi_emac_little pi_mdio_clock po_master_mdc pi_master_mdio po_master_mdio po_master_oni po_emac_mdc_err pi_emac_mdc_wdata po_emac_mdc_rdata pi_host_mdc_start po_emac_mdc_done pi_emac_mdc_rnw pi_emac_mdc_daddr pi_emac_mdc_raddr pi_test_en pi_bistmode_en regs_bank (ip_mac_regs_bank) pi_host_reset pi_host_clock pi_config_mcmd pi_config_maddr pi_config_mdata po_config_sdva po_config_sdata po_config_serr pi_host_serr pi_host_base_addr po_host_int po_setup_wakeup po_setup_wr_data po_setup_wr_setup po_host_csr0_tap po_host_csr0_ape po_host_csr0_pbl po_host_csr0_ble po_host_csr0_dso po_host_csr0_bar po_host_csr14_swr po_host_csr1_tpd po_host_csr2_rpd po_host_csr3_stl po_host_csr4_srl pi_rx_ovf pi_rx_csr5_rwt pi_host_csr5_rps pi_host_csr5_ru pi_host_csr5_ri pi_tx_csr5_unf pi_tx_csr5_tjt pi_host_csr5_tu pi_host_csr5_tps pi_host_csr5_ti po_tx_csr6_sf po_tx_csr6_tr po_global_csr6_om po_global_csr6_fd po_global_csr6_be po_rx_csr6_pm po_rx_csr6_pr po_rx_csr6_perfectf po_rx_csr6_hashf po_rx_csr6_inversef po_rx_csr6_multicast_only po_rx_csr6_pb po_mac_csr6_lb po_tx_csr8_ifg1 po_tx_csr8_ifg2 po_tx_csr9_bl po_tx_csr10_xon po_tx_csr10_xoff po_rx_csr11_bcn po_rx_csr11_erfc po_rx_csr11_etfc po_rx_csr11_put po_rx_csr11_plt po_mdio_csr12_sb pi_mdio_csr12_sb po_mdio_csr12_rnw po_mdio_csr12_rad po_mdio_csr12_dad pi_mdio_csr13_mer po_mdio_csr13_md pi_mdio_csr13_md po_host_csr14_sr po_host_csr14_st po_tx_csr14_not_st po_tx_csr14_not_sr pi_tx_idone pi_rx_idone po_global_cfda_slm po_global_cfda_szm {host_rx_clock_en, host_rxds_clock_en, host_tx_clock_en, host_txds_clock_en, host_tx1_clock_en} host_tx1_clock_en host_txds_clock_en host_tx_clock_en host_rxds_clock_en host_rx_clock_en host_tx1_clock {host_rx_clock, host_rxds_clock, host_tx_clock, host_txds_clock, host_tx1_clock} host_txds_clock host_tx_clock host_rxds_clock host_rx_clock ! global_csr6_fd global_csr6_fd ! host_csr0_ble host_csr0_ble ip_emac_top pi_emac_reset pi_emac_ref_clock pi_emac_tx_clock po_emac_gtx_clock po_emac_tx_en po_emac_tx_err po_emac_tx_data pi_emac_tx_col pi_emac_tx_crs pi_emac_rx_clock pi_emac_rx_dv pi_emac_rx_err pi_emac_rx_data pi_emac_host_clock pi_emac_base_address po_emac_host_mcmd po_emac_host_maddr po_emac_host_mdata po_emac_host_mlast pi_emac_host_sdata pi_emac_host_sdva pi_emac_host_serr pi_emac_config_mcmd pi_emac_config_maddr pi_emac_config_mdata po_emac_config_sdata po_emac_config_sdva po_emac_config_serr po_host_int pi_emac_mdio_clock po_emac_mdio_clock pi_emac_master_mdio po_emac_master_mdio po_emac_master_oni pi_mac_test_en pi_mac_scan_en pi_mac_scan_in po_mac_scan_out pi_bistmode_en

Schematic Diagram of ip_emac_top