Vertical Alignment

When enabled, this option performs vertical alignment.

  • Vertical Alignment Tokens (ro.amiq.vhdldt/format.vertical_align.tokens)

The lines of code inside the same scope are aligned by the specified comma separated list of vertical alignment tokens. Vertical alignment is performed left to right, by the same token. In order to use the comma character ‘,’ as a vertical alignment token, the character must be preceded by the escaping character ‘\’.

Before

After (“:=,:” tokens)

../../_images/before-vertical-align-tokens-vhdl.png
../../_images/after-vertical-align-tokens-vhdl.png
  • Only consecutive lines (ro.amiq.vhdldt/format.vertical_align.consecutive_lines) - When enabled, only consecutive lines are vertically aligned. Two lines are consecutive if they follow each other or are separated by comment lines.

Before

After

../../_images/before-only-consecutive-lines-vhdl.png
../../_images/after-only-consecutive-lines-vhdl.png
  • Vertical align single line comments (ro.amiq.vhdldt/format.vertical_align.sl_comments) - When enabled, single line comments are aligned.

Before

After

../../_images/before-vertical-align-single-line-comments-vhdl.png
../../_images/after-vertical-align-single-line-comments-vhdl.png
  • Vertical align to open parenthesis (ro.amiq.vhdldt/format.vertical_align.paren) - When enabled, vertical align to open parenthesis.

Before

After

../../_images/before-vertical-align-to-open-parenthesis-vhdl.png
../../_images/after-vertical-align-to-open-parenthesis-vhdl.png

Vertical Align Patterns (ro.amiq.vhdldt/format.vertical_align.vregex)

  • Constant Declarations (VhdlConstantDeclarations) - Controls whether to align constant declarations.

Before

After

../../_images/before-vertical-align-constant-declaration-vhdl.png
../../_images/after-vertical-align-constant-declaration-vhdl.png
  • Port Declarations (VhdlPortDeclarations) - Controls whether to align port declarations.

Before

After

../../_images/before-vertical-align-port-declaration-vhdl.png
../../_images/after-vertical-align-port-declaration-vhdl.png
  • Record Declarations (VhdlRecordDeclarations) - Controls whether to align record declarations.

Before

After

../../_images/before-vertical-align-record-declaration-vhdl.png
../../_images/after-vertical-align-record-declaration-vhdl.png
  • Signal Declarations (VhdlSignalDeclarations) - Controls whether to align signal declarations.

Before

After

../../_images/before-vertical-align-signal-declaration-vhdl.png
../../_images/after-vertical-align-signal-declaration-vhdl.png
  • Variable Declarations (VhdlVariableDeclarations) - Controls whether to align variable declarations.

Before

After

../../_images/before-vertical-align-variable-declaration-vhdl.png
../../_images/after-vertical-align-variable-declaration-vhdl.png
  • Variable, Signal, Constant Declarations (VhdlVariableSignalConstantDeclarations) - Controls whether to align variable, signal and constant declarations.

Before

After

../../_images/before-vertical-align-variable-signal-constant-declaration-vhdl.png
../../_images/after-vertical-align-variable-signal-constant-declaration-vhdl.png