PoC.fifo

The namespace PoC.fifo offers different FIFO implementations.

Package

The package PoC.fifo holds all component declarations for this namespace.

Entities

PoC offers FIFOs with a got-interface. This means, the current read-pointer value is available on the output. Asserting the got-input, acknoledge the processing of the current output signals and moves the read-pointer to the next value, if available.

All FIFOs implement a bidirectional flow control (put/full and valid/got). Each FIFO also offers a EmptyState (write-side) and FullState (read-side) to indicate the current fill-state.

The prefixes cc_ (common clock), dc_ (dependent clock) and ic_ (independent clock) refer to the write- and read-side clock relationship.

  • PoC.fifo.cc_got implements a regular FIFO (one common clock, got-interface)

  • PoC.fifo.cc_got_tempgot implements a regular FIFO (one common clock, got-interface), extended by a transactional tempgot-interface (read-side).

  • PoC.fifo.cc_got_tempput implements a regular FIFO (one common clock, got-interface), extended by a transactional tempput-interface (write-side).

  • PoC.fifo_dc_got implements a cross-clock FIFO (two related clocks, got-interface)

  • PoC.fifo.ic_got implements a cross-clock FIFO (two independent clocks, got-interface)

  • PoC.fifo.glue implements a two-stage FIFO (one common clock, got-interface)

  • PoC.fifo.shift implements a regular FIFO (one common clock, got-interface, optimized for FPGAs with shifter primitives)