Entity stream_Source

Block Diagram of stream_Source

Generics

Name	Type	Default	Description
TESTCASES	T_SIM_STREAM_FRAMEGROUP_VECTOR_8

Ports

Name	Type	Direction	Description
Clock	std_logic	in
Reset	std_logic	in
Enable	std_logic	in	Control interface
Out_Valid	std_logic	out	OUT Port
Out_Data	T_SLV_8	out
Out_SOF	std_logic	out
Out_EOF	std_logic	out
Out_Ack	std_logic	in

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