[source]

Architecture rtl of fifo_ic_got

Processes

process @(clk_wr)

Update Write Pointer upon puti

'0' '0' '1' '1' 1 [(not (rst_wr = '1') and not (IP0 = not OPc(A_BITS) & OPc(A_BITS - 1 downto 0)))]
FSM Transitions for Ful

#

Current State

Next State

Condition

Comment

1

'1'

'0'

[(not (rst_wr = '1') and not (IP0 = not OPc(A_BITS) & OPc(A_BITS - 1 downto 0)))]
process @(clk_rd)
'1' '1' '0' '0' 1 [(not (rst_rd = '1') and not (OP0 = IPc))]
FSM Transitions for Avl

#

Current State

Next State

Condition

Comment

1

'0'

'1'

[(not (rst_rd = '1') and not (OP0 = IPc))]