Entity xil_ChipScopeICON

Block Diagram of xil_ChipScopeICON

This module wraps 15 ChipScope ICON IP core netlists generated from ChipScope ICON xco files. The generic parameter PORTS selects the apropriate ICON instance with 1 to 15 ICON ControlBus ports. Each ControlBus port is of type T_XIL_CHIPSCOPE_CONTROL and of mode inout.

Compile required CoreGenerator IP Cores to Netlists with PoC

Please use the provided Xilinx ISE compile command ise in PoC to recreate the needed source and netlist files on your local machine.

cd PoCRoot
.\poc.ps1 ise PoC.xil.ChipScopeICON --board=KC705

SeeAlso: Using PoC -> Synthesis </UsingPoC/Synthesis>

For how to run synthesis with PoC and CoreGenerator.

Generics

Name	Type	Default	Description
PORTS	positive

Ports

Name	Type	Direction	Description
ControlBus	T_XIL_CHIPSCOPE_CONTROL_VECTOR	inout

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