Entity filter_and
Block Diagram of filter_and
Name |
Type |
Default |
Description |
---|---|---|---|
TAPS |
positive |
4 |
|
INIT |
std_logic |
'0' |
|
ADD_OUTPUT_REG |
boolean |
FALSE |
Name |
Type |
Direction |
Description |
---|---|---|---|
Clock |
std_logic |
in |
|
DataIn |
std_logic |
in |
|
DataOut |
std_logic |
out |
filtered signal |
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