[source]

Entity stream_FrameGenerator

DATA_BITSWORD_BITSAPPENDFRAMEGROUPSClockstd_logicResetstd_logicCommandT_FRAMEGEN_COMMANDPauseT_SLV_16FrameGroupIndexT_SLV_8FrameIndexT_SLV_8SequencesT_SLV_16FrameLengthT_SLV_16Out_Ackstd_logicStatusT_FRAMEGEN_STATUSOut_Validstd_logicOut_Datastd_logic_vector[DATA_BITS - 1 downto 0]Out_SOFstd_logicOut_EOFstd_logic

Block Diagram of stream_FrameGenerator

Generics

Name

Type

Default

Description

DATA_BITS

positive

8

WORD_BITS

positive

16

APPEND

T_FRAMEGEN_APPEND

FRAMEGEN_APP_NONE

FRAMEGROUPS

T_FRAMEGEN_FRAMEGROUP_VECTOR_8

(0 => C_FRAMEGEN_FRAMEGROUP_EMPTY)

Ports

Name

Type

Direction

Description

Clock

std_logic

in

Reset

std_logic

in

Command

T_FRAMEGEN_COMMAND

in

CSE interface

Status

T_FRAMEGEN_STATUS

out

Pause

T_SLV_16

in

Control interface

FrameGroupIndex

T_SLV_8

in

FrameIndex

T_SLV_8

in

Sequences

T_SLV_16

in

FrameLength

T_SLV_16

in

Out_Valid

std_logic

out

OUT Port

Out_Data

std_logic_vector

out

Out_SOF

std_logic

out

Out_EOF

std_logic

out

Out_Ack

std_logic

in