[source]

Component dstruct_deque

D_BITSMIN_DEPTHclkstd_logicrststd_logicdinA[D_BITS - 1 downto 0]std_logic_vectorputAstd_logicgotAstd_logicdinB[D_BITS - 1 downto 0]std_logic_vectorputBstd_logicgotBstd_logicdoutAstd_logic_vector[D_BITS - 1 downto 0]validAstd_logicfullAstd_logicdoutBstd_logic_vector[D_BITS - 1 downto 0]validBstd_logicfullBstd_logic

Block Diagram of dstruct_deque

Generics

Name

Type

Initial Value

Description

D_BITS

positive

Data Width

MIN_DEPTH

positive

Minimum Deque Depth

Ports

Name

Direction

Type

Description

clk

in

std_logic

Shared Ports

rst

in

std_logic

dinA

in

std_logic_vector

Port A DataA Input

putA

in

std_logic

gotA

in

std_logic

doutA

out

std_logic_vector

DataA Output

validA

out

std_logic

fullA

out

std_logic

dinB

in

std_logic_vector

Port B DataB Input

putB

in

std_logic

gotB

in

std_logic

doutB

out

std_logic_vector

validB

out

std_logic

fullB

out

std_logic