[source]

Entity arith_counter_bcd

DIGITSclkstd_logicrststd_logicincstd_logicvalT_BCD_VECTOR[DIGITS - 1 downto 0]

Block Diagram of arith_counter_bcd

Counter with output in binary coded decimal (BCD). The number of BCD digits is configurable by DIGITS.

All control signals (reset rst, increment inc) are high-active and synchronous to clock clk. The output val is the current counter state. Groups of 4 bit represent one BCD digit. The lowest significant digit is specified by val(3 downto 0).

implement a dec input for decrementing implement a load input to load a value

Generics

Name

Type

Default

Description

DIGITS

positive

Number of BCD digits

Ports

Name

Type

Direction

Description

clk

std_logic

in

rst

std_logic

in

Reset to 0

inc

std_logic

in

Increment

val

T_BCD_VECTOR

out

Value output