Module ibex_counter
Block Diagram of ibex_counter
Name |
Default |
Description |
---|---|---|
CounterWidth |
32 |
|
ProvideValUpd |
0 |
Name |
Type |
Direction |
Description |
---|---|---|---|
clk_i |
wire logic |
input |
|
rst_ni |
wire logic |
input |
|
counter_inc_i |
wire logic |
input |
|
counterh_we_i |
wire logic |
input |
|
counter_we_i |
wire logic |
input |
|
counter_val_i |
wire logic [31 : 0] |
input |
|
counter_val_o |
var logic [63 : 0] |
output |
|
counter_val_upd_o |
var logic [63 : 0] |
output |
Always Blocks
- always_comb @()
Update
Instances
- ibex_top : ibex_top
- u_ibex_core : ibex_core
- cs_registers_i : ibex_cs_registers
mcycle_counter_i : ibex_counter
minstret_counter_i : ibex_counter
Submodules
- ibex_counter
g_cnt_no_dsp : [if !(UseDsp=="yes")]
g_counter_full : [if !(CounterWidth<64)]
×
When set
counter_val_upd_o
provides an incremented version of the counter value, otherwise the output is hard-wired to 0. This is required to allow Xilinx DSP inference to work correctly. WhenProvideValUpd
is set no DSPs are inferred.