Package riscv_signature_pkg

Enums

core_status_t

Enum Items:

• INITIALIZED

• IN_DEBUG_MODE

• IN_MACHINE_MODE

• IN_HYPERVISOR_MODE

• IN_SUPERVISOR_MODE

• IN_USER_MODE

• HANDLING_IRQ

• FINISHED_IRQ

• HANDLING_EXCEPTION

• INSTR_FAULT_EXCEPTION

• ILLEGAL_INSTR_EXCEPTION

• LOAD_FAULT_EXCEPTION

• STORE_FAULT_EXCEPTION

• EBREAK_EXCEPTION

signature_type_t

Will be the lowest 8 bits of the data word

Enum Items:

• CORE_STATUS

  Information sent to the core relating its current status. Bits [12:8] of the data word will be the core_status_t value corresponding to the current core status.

• TEST_RESULT

  Information sent to the core conveying the uvm simulation result. Bit [8] of the data word will be the test_result_t value.

• WRITE_GPR

  Sent to the core to indicate a dump of GPRs to testbench. Will be followed by 32 writes of registers x0-x32.

• WRITE_CSR

  Sent to the core to indicate a write of a CSR's data. Bits [19:8] of the data word will be the CSR address. Will be followed by a second write of the actual data from the CSR.

test_result_t

Enum Items:

• TEST_PASS

• TEST_FAIL

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