[source]

Class uvm_pkg::uvm_push_sequencer

uvm_pkg::uvm_push_sequencer <REQ, RSP> + req_port : uvm_blocking_put_port #(REQ) + run_phase() uvm_pkg::uvm_blocking_put_port <T> req_port

Collaboration Diagram of uvm_push_sequencer

Copyright 2007-2011 Mentor Graphics Corporation Copyright 2007-2011 Cadence Design Systems, Inc. Copyright 2010 Synopsys, Inc. All Rights Reserved Worldwide

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

CLASS

uvm_push_sequencer #(REQ,RSP)

Parameters

Name

Default value

Description

REQ

uvm_sequence_item

RSP

REQ

Variables

Name

Type

Description

req_port

uvm_blocking_put_port#(uvm_sequence_item)

Port

req_port

The push sequencer requires access to a blocking put interface. A continuous stream of sequence items are sent out this port, based on the list of available sequences loaded into this sequencer.

Typedefs

Name

Actual Type

Description

this_type

uvm_push_sequencer#(REQ, RSP)

Constructors

new(string name, uvm_component parent = null)

Function

new

Standard component constructor that creates an instance of this class using the given name and parent , if any.

Parameters:

Tasks

run_phase(uvm_phase phase)

Task

run_phase

The push sequencer continuously selects from its list of available sequences and sends the next item from the selected sequence out its req_port using req_port.put(item). Typically, the req_port would be connected to the req_export on an instance of a <uvm_push_driver #(REQ,RSP)>, which would be responsible for executing the item.

Parameters:

phase (uvm_phase)