[source]

Class dv_lib_pkg::dv_base_sequencer

dv_lib_pkg::dv_base_sequencer <ITEM_T, CFG_T, RSP_ITEM_T> + cfg : CFG_T + req_analysis_fifo : uvm_tlm_analysis_fifo #(ITEM_T) + rsp_analysis_fifo : uvm_tlm_analysis_fifo #(RSP_ITEM_T) + build_phase(): void + get_object_type(): uvm_object_wrapper + get_type(): type_id push_pull_agent_pkg::push_pull_sequencer <ITEM_T : push_pull_item, CFG_T : push_pull_agent_cfg, RSP_ITEM_T : push_pull_item>

Inheritance Diagram of dv_base_sequencer

dv_lib_pkg::dv_base_sequencer <ITEM_T, CFG_T, RSP_ITEM_T> + cfg : CFG_T + req_analysis_fifo : uvm_tlm_analysis_fifo #(ITEM_T) + rsp_analysis_fifo : uvm_tlm_analysis_fifo #(RSP_ITEM_T) + build_phase(): void + get_object_type(): uvm_object_wrapper + get_type(): type_id uvm_pkg::uvm_tlm_analysis_fifo <T> dv_lib_pkg::dv_base_agent_cfg req_analysis_fifo rsp_analysis_fifo cfg

Collaboration Diagram of dv_base_sequencer

Parameters

Name

Default value

Description

ITEM_T

uvm_sequence_item

CFG_T

dv_base_agent_cfg

RSP_ITEM_T

ITEM_T

Variables

Name

Type

Description

req_analysis_fifo

uvm_tlm_analysis_fifo#(uvm_sequence_item)

These fifos collects items when req/rsp is received, which are used to communicate between monitor and sequences. These fifos are optional When device is re-active, it gets items from req_analysis_fifo and send rsp to driver When this is a high-level agent, monitors put items to these 2 fifos for high-level seq

rsp_analysis_fifo

uvm_tlm_analysis_fifo#(uvm_sequence_item)

cfg

dv_base_agent_cfg

Constructors

new(string name = "", uvm_component parent = null)
Parameters:

Functions

build_phase(uvm_phase phase)
Parameters:

phase (uvm_phase)