Class dv_lib_pkg::dv_base_sequencer
Inheritance Diagram of dv_base_sequencer
Collaboration Diagram of dv_base_sequencer
Name |
Default value |
Description |
---|---|---|
ITEM_T |
uvm_sequence_item |
|
CFG_T |
dv_base_agent_cfg |
|
RSP_ITEM_T |
ITEM_T |
Name |
Type |
Description |
---|---|---|
req_analysis_fifo |
||
rsp_analysis_fifo |
||
cfg |
Constructors
- new(string name = "", uvm_component parent = null)
- Parameters:
name (string)
parent (uvm_component)
Functions
- build_phase(uvm_phase phase)
- Parameters:
phase (uvm_phase)
×
These fifos collects items when req/rsp is received, which are used to communicate between monitor and sequences. These fifos are optional When device is re-active, it gets items from req_analysis_fifo and send rsp to driver When this is a high-level agent, monitors put items to these 2 fifos for high-level seq