Module ibex_fetch_fifo

ibex_fetch_fifo #( .NUM_REQS(NUM_REQS), .ResetAll(ResetAll) ) u_ibex_fetch_fifo ( .clk_i(clk_i), .rst_ni(rst_ni), .clear_i(clear_i), .busy_o(busy_o), .in_valid_i(in_valid_i), .in_addr_i(in_addr_i), .in_rdata_i(in_rdata_i), .in_err_i(in_err_i), .out_valid_o(out_valid_o), .out_ready_i(out_ready_i), .out_addr_o(out_addr_o), .out_rdata_o(out_rdata_o), .out_err_o(out_err_o), .out_err_plus2_o(out_err_plus2_o) );

Block Diagram of ibex_fetch_fifo

Parameters

Name	Default	Description
NUM_REQS	2
ResetAll	1'b0

Ports

Name	Type	Direction	Description
clk_i	wire logic	input
rst_ni	wire logic	input
clear_i	wire logic	input	control signals clears the contents of the FIFO
busy_o	var logic [NUM_REQS - 1 : 0]	output
in_valid_i	wire logic	input	input port
in_addr_i	wire logic [31 : 0]	input
in_rdata_i	wire logic [31 : 0]	input
in_err_i	wire logic	input
out_valid_o	var logic	output	output port
out_ready_i	wire logic	input
out_addr_o	var logic [31 : 0]	output
out_rdata_o	var logic [31 : 0]	output
out_err_o	var logic	output
out_err_plus2_o	var logic	output

Assertions

Name	Kind	Description
ibex_fetch_fifo.IbexFetchFifoPushPopFull	concurent assert	Must not push and pop simultaneously when FIFO full. disable iff((!rst_ni)!=='0)((in_valid_i && pop_fifo) |-> (! valid_q[DEPTH - 1] || clear_i))
ibex_fetch_fifo.IbexFetchFifoPushFull	concurent assert	Must not push to FIFO when full. disable iff((!rst_ni)!=='0)(in_valid_i |-> (! valid_q[DEPTH - 1] || clear_i))

Always Blocks

always_comb @()

////////////////////////////////////// Instruction aligner (if unaligned) // //////////////////////////////////////

always_ff @(posedge clk_i or negedge rst_ni)

////////////////// FIFO registers // //////////////////

Instances

• ibex_top : ibex_top

  • u_ibex_core : ibex_core

    • if_stage_i : ibex_if_stage

      • gen_prefetch_buffer : [if !(ICache)]

        • prefetch_buffer_i : ibex_prefetch_buffer

          • fifo_i : ibex_fetch_fifo

Submodules

• ibex_fetch_fifo

  • g_fifo_next : [for (genvar i=0;i<(DEPTH-1);i++)]

  • g_fifo_regs : [for (genvar i=0;i<DEPTH;i++)]

  • g_instr_addr_nr : [if !(ResetAll)]

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