Module prim_and2

prim_and2 #( .Width(Width) ) u_prim_and2 ( .in0_i(in0_i), .in1_i(in1_i), .out_o(out_o) );

Block Diagram of prim_and2

Abstract primitives wrapper.

This file is a stop-gap until the DV file list is generated by FuseSoC. Its contents are taken from the file which would be generated by FuseSoC. https://github.com/lowRISC/ibex/issues/893

Parameters

Name	Default	Description
Width	1

Ports

Name	Type	Direction	Description
in0_i	wire logic [Width - 1 : 0]	input
in1_i	wire logic [Width - 1 : 0]	input
out_o	var logic [Width - 1 : 0]	output

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