[source]

Module prim_secded_inv_39_32_dec

data_i[38:0]logicdata_ologic[31:0]syndrome_ologic[6:0]err_ologic[1:0]

Block Diagram of prim_secded_inv_39_32_dec

SECDED decoder generated by util/design/secded_gen.py

Ports

Name

Type

Direction

Description

data_i

wire logic [38 : 0]

input

data_o

var logic [31 : 0]

output

syndrome_o

var logic [6 : 0]

output

err_o

var logic [1 : 0]

output