Macros
Name |
Description |
|---|---|
BUILD_SEED |
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DUT_HIER_STR |
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DV_ASSERT_CTRL(LABEL_, HIER_, LEVELS_ =0, SCOPE_ ="", ID_ =$sformatf("%m")) |
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DV_ASSERT_CTRL_REQ(LABEL_, VALUE_, SCOPE_ ="") |
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DV_CHECK(T_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_CASE_EQ(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_CASE_NE(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_EQ(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_EQ_FATAL(ACT_, EXP_, MSG_ ="", ID_ =gfn) |
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DV_CHECK_FATAL(T_, MSG_ ="", ID_ =gfn) |
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DV_CHECK_GE(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_GE_FATAL(ACT_, EXP_, MSG_ ="", ID_ =gfn) |
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DV_CHECK_GT(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_GT_FATAL(ACT_, EXP_, MSG_ ="", ID_ =gfn) |
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DV_CHECK_LE(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_LE_FATAL(ACT_, EXP_, MSG_ ="", ID_ =gfn) |
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DV_CHECK_LT(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_LT_FATAL(ACT_, EXP_, MSG_ ="", ID_ =gfn) |
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DV_CHECK_MEMBER_RANDOMIZE_FATAL(VAR_, CLS_INST_ =this, MSG_ ="Randomization failed!", ID_ =gfn) |
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DV_CHECK_MEMBER_RANDOMIZE_WITH_FATAL(VAR_, C_, CLS_INST_ =this, MSG_ ="Randomization failed!", ID_ =gfn) |
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DV_CHECK_NE(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_NE_FATAL(ACT_, EXP_, MSG_ ="", ID_ =gfn) |
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DV_CHECK_Q_EQ(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_RANDOMIZE_FATAL(VAR_, MSG_ ="Randomization failed!", ID_ =gfn) |
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DV_CHECK_RANDOMIZE_WITH_FATAL(VAR_, WITH_C_, MSG_ ="Randomization failed!", ID_ =gfn) |
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DV_CHECK_STD_RANDOMIZE_FATAL(VAR_, MSG_ ="Randomization failed!", ID_ =gfn) |
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DV_CHECK_STD_RANDOMIZE_WITH_FATAL(VAR_, WITH_C_, MSG_ ="Randomization failed!", ID_ =gfn) |
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DV_CHECK_STREQ(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_STREQ_FATAL(ACT_, EXP_, MSG_ ="", ID_ =gfn) |
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DV_CHECK_STRNE(ACT_, EXP_, MSG_ ="", SEV_ =error, ID_ =gfn) |
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DV_CHECK_STRNE_FATAL(ACT_, EXP_, MSG_ ="", ID_ =gfn) |
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DV_COMMON_CLK_CONSTRAINT(FREQ_) |
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DV_CREATE_SIGNAL_PROBE_FUNCTION(FUNC_NAME_, SIGNAL_PATH_, SIGNAL_WIDTH_ =uvm_pkg::UVM_HDL_MAX_WIDTH) |
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DV_EOT_PRINT_MAILBOX_CONTENTS(TYP_, MAILBOX_, SEV_ =error, ID_ =gfn) |
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DV_EOT_PRINT_Q_ARR_CONTENTS(TYP_, Q_, SEV_ =error, ID_ =gfn) |
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DV_EOT_PRINT_Q_CONTENTS(TYP_, Q_, SEV_ =error, ID_ =gfn) |
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DV_EOT_PRINT_TLM_FIFO_ARR_CONTENTS(TYP_, FIFO_, SEV_ =error, ID_ =gfn) |
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DV_EOT_PRINT_TLM_FIFO_CONTENTS(TYP_, FIFO_, SEV_ =error, ID_ =gfn) |
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DV_FCOV_EXPR_SEEN(NAME_, EXPR_) |
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DV_FCOV_INSTANTIATE_CG(NAME_, COND_ =1'b1, ARGS_ =()) |
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DV_FCOV_MARK_UNUSED(TYPE_, NAME_) |
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DV_FCOV_SIGNAL(TYPE_, NAME_, EXPR_) |
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DV_FCOV_SIGNAL_GEN_IF(TYPE_, NAME_, EXPR_, GEN_COND_, DEFAULT_ ='0) |
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DV_FCOV_SVA(EV_NAME_, PROP_, CLK_ =clk_i, RST_ =rst_ni) |
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DV_GET_ENUM_PLUSARG(ENUM_, VAR_, PLUSARG_, CHECK_EXISTS_ =0, ID_ =gfn) |
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DV_GET_QUEUE_PLUSARG(QUEUE_, PLUSARG_, DELIMITER_ =",", CHECK_EXISTS_ =0, ID_ =gfn) |
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DV_MAX2(a, b) |
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DV_PRINT_ARR_CONTENTS(ARR_, V_ =uvm_pkg::UVM_MEDIUM, ID_ =gfn) |
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DV_SPINWAIT(WAIT_, MSG_ ="timeout occurred!", TIMEOUT_NS_ =default_spinwait_timeout_ns, ID_ =gfn) |
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DV_SPINWAIT_EXIT(WAIT_, EXIT_, MSG_ ="exit condition occurred!", ID_ =gfn) |
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DV_STRINGIFY(I_) |
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DV_WAIT(WAIT_COND_, MSG_ ="wait timeout occurred!", TIMEOUT_NS_ =default_spinwait_timeout_ns, ID_ =gfn) |
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DV_WAIT_TIMEOUT(TIMEOUT_NS_, ID_ =gfn, ERROR_MSG_ ="timeout occurred!", REPORT_FATAL_ =1) |
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GET_PARITY(val, odd =0) |
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IBEX_CFG_RV32B |
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IBEX_CFG_RV32M |
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IBEX_CFG_RegFile |
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INC_ASSERT |
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OTDBG(x) |
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PRIM_DEFAULT_IMPL |
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UVM_CORESERVICE_TYPE |
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UVM_DEPRECATED_STARTING_PHASE |
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UVM_HDL_MAX_WIDTH |
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UVM_LINE_WIDTH |
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UVM_MAX_STREAMBITS |
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UVM_NUM_LINES |
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UVM_PACKER_MAX_BYTES |
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UVM_REG_ADDR_WIDTH |
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UVM_REG_BYTENABLE_WIDTH |
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UVM_REG_CVR_WIDTH |
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UVM_REG_DATA_WIDTH |
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UVM_USE_PROCESS_CONTAINER |
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downcast(EXT_, BASE_, MSG_ ="", SEV_ =fatal, ID_ =gfn) |
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dv_error(MSG_, ID_ =$sformatf("%m")) |
verilog_lint waive macro-name-style |
dv_fatal(MSG_, ID_ =$sformatf("%m")) |
verilog_lint waive macro-name-style |
dv_info(MSG_, VERBOSITY_ =uvm_pkg::UVM_LOW, ID_ =$sformatf("%m")) |
verilog_lint waive macro-name-style |
dv_warning(MSG_, ID_ =$sformatf("%m")) |
verilog_lint waive macro-name-style |
gfn |
verilog_lint waive macro-name-style |
gmv(csr) |
verilog_lint waive macro-name-style |
gn |
verilog_lint waive macro-name-style |
gtn |
verilog_lint waive macro-name-style |
uvm_component_new |
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uvm_create_comp(_type_name_, _inst_name_) |
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uvm_create_obj(_type_name_, _inst_name_) |
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uvm_object_new |
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uvm_record_attribute(TR_HANDLE, NAME, VALUE) |
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uvm_record_int(NAME, VALUE, SIZE, RADIX =UVM_NORADIX) |
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uvm_record_real(NAME, VALUE) |
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uvm_record_string(NAME, VALUE) |
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uvm_record_time(NAME, VALUE) |
Name |
Description |
|---|---|
CDNS_NO_SQR_CHK_SEQ_ID |
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CHECK_MISALIGNED |
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DV_FCOV_DISABLE |
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DV_FCOV_DISABLE_CP |
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FORMAL |
This is only used for the Yosys-based formal flow. Once we have working bind support, we can get rid of it. |
FPGA_XILINX |
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FPV_ON |
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MODEL_TECH |
Any vendor specific defines go here. |
PrimCountFpv |
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QUESTA |
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RISCV_FORMAL |
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SIMULATION |
Enable the randomization of DefaultSeed using DefaultSeedLocal in DV simulations. |
SYNTHESIS |
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SYNTHESIS_MEMORY_BLACK_BOXING |
For certain synthesis experiments we compile the design with generic models to get an unmapped netlist (GTECH). In these synthesis experiments, we typically black-box the memory models since these are going to be simulated using plain RTL models in netlist simulations. This can be done by analyzing and elaborating the design, and then removing the memory submodules before writing out the verilog netlist. However, memory arrays can take a long time to elaborate, and in case of dual port rams they can even trigger elab errors due to multiple processes writing to the same memory variable concurrently. To this end, we exclude the entire logic in this module in these runs with the following macro. |
TODO |
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UVM_CB_TRACE_ON |
The +define+UVM_CB_TRACE_ON setting will instrument the uvm library to emit messages with message id UVMCB_TRC and UVM_NONE verbosity notifing add,delete and execution of uvm callbacks. The instrumentation is off by default. |
UVM_CMDLINE_NO_DPI |
Import DPI functions used by the interface to generate the lists. |
UVM_DEPRECATED_REPORTING |
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UVM_DISABLE_AUTO_ITEM_RECORDING |
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UVM_EMPTY_MACROS |
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UVM_ENABLE_FIELD_CHECKS |
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UVM_FIX_REV |
Macro UVM_VERSION_STRING Provides a string-ized version of the UVM Library version number. When there is a FIX_REV, the string is " |
UVM_HDL_NO_DPI |
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UVM_NO_DEPRECATED |
Deprecation Control Macros |
UVM_NO_DPI |
Top-level file for DPI subroutines used by UVM. Tool-specific distribution overlays may be required. To use UVM without any tool-specific overlay, use +defin+UVM_NO_DPI |
UVM_NO_WAIT_FOR_NBA |
If `included directly in a program block, can't use a non-blocking assign, but it isn't needed since program blocks are in a separate region. |
UVM_OBJECT_DO_NOT_NEED_CONSTRUCTOR |
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UVM_REG_NO_INDIVIDUAL_FIELD_ACCESS |
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UVM_REPORT_DISABLE_FILE |
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UVM_REPORT_DISABLE_FILE_LINE |
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UVM_REPORT_DISABLE_LINE |
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UVM_USE_PROCESS_STATE |
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UVM_USE_RESOURCE_CONVERTER |
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UVM_USE_STRING_QUEUE_STREAMING_PACK |
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UVM_USE_SUSPEND_RESUME |
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VCS |
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VERILATOR |
The basic helper macros are actually defined in "implementation headers". The macros should do the same thing in each case (except for the dummy flavour), but in a way that the respective tools support. If the tool supports assertions in some form, we also define INC_ASSERT (which can be used to hide signal definitions that are only used for assertions). The list of basic macros supported is: ASSERT_I Immediate assertion. Note that immediate assertions are sensitive to simulation glitches. ASSERT_INIT Assertion in initial block. Can be used for things like parameter checking. ASSERT_INIT_NET Assertion in initial block. Can be used for initial value of a net. ASSERT_FINAL Assertion in final block. Can be used for things like queues being empty at end of sim, all credits returned at end of sim, state machines in idle at end of sim. ASSERT_AT_RESET Assertion just before reset. Can be used to check sum-like properties that get cleared at reset. Note that unless your simulation ends with a reset, the property does not get checked at end of simulation; use ASSERT_AT_RESET_AND_FINAL if the property should also get checked at end of simulation. ASSERT_AT_RESET_AND_FINAL Assertion just before reset and in final block. Can be used to check sum-like properties before every reset and at the end of simulation. ASSERT Assert a concurrent property directly. It can be called as a module (or interface) body item. Note We use (_rst !== '0) in the disable iff statements instead of (_rst == '1). This properly disables the assertion in cases when reset is X at the beginning of a simulation. For that case, (reset == '1) does not disable the assertion. ASSERT_NEVER Assert a concurrent property NEVER happens ASSERT_KNOWN Assert that signal has a known value (each bit is either '0' or '1') after reset. It can be called as a module (or interface) body item. COVER Cover a concurrent property ASSUME Assume a concurrent property ASSUME_I Assume an immediate property |
YOSYS |
Name |
Value |
Description |
|---|---|---|
ASSERT(__name, __prop, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
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ASSERT_AT_RESET(__name, __prop, __rst =ASSERT_DEFAULT_RST) |
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ASSERT_AT_RESET_AND_FINAL(__name, __prop, __rst =ASSERT_DEFAULT_RST) |
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ASSERT_DEFAULT_CLK |
clk_i |
Default clk and reset signals used by assertion macros below. |
ASSERT_DEFAULT_RST |
!rst_ni |
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ASSERT_ERROR(__name) |
ASSERT_ERROR logs an error message with either `uvm_error or with $error. This somewhat duplicates `DV_ERROR macro defined in hw/dv/sv/dv_utils/dv_macros.svh. The reason for redefining it here is to avoid creating a dependency. |
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ASSERT_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_, MAX_CYCLES_, ERR_NAME_) |
When an error signal rises, expect to see the associated alert in at most MAX_CYCLE_ cycles. The NAME_, HIER_, GATE_, MAX_CYCLES_ and ERR_NAME_ arguments are the same as for `ASSERT_ERROR_TRIGGER_ERR. The ALERT_ argument is the name of the alert that we expect to be asserted. This macro adds an assumption that says the named error signal will stay low for the first 10 cycles after reset. |
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ASSERT_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_, MAX_CYCLES_, ERR_NAME_, CLK_, RST_) |
When a named error signal rises, expect to see an associated error in at most MAX_CYCLES_ cycles. The NAME_ argument gets included in the name of the generated assertion, following an FpSecCm prefix. The error signal should be at HIER_.ERR_NAME_ and the posedge is ignored if GATE_ is true. This macro drives a magic "unused_assert_connected" signal, which is used for a static check to ensure the assertions are in place. |
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ASSERT_FINAL(__name, __prop) |
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ASSERT_FPV_LINEAR_FSM(__name, __state, __type, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
FPV assertion that proves that the FSM control flow is linear (no loops) The sequence triggers whenever the state changes and stores the current state as "initial_state". Then thereafter we must never see that state again until reset. It is possible for the reset to release ahead of the clock. Create a small "gray" window beyond the usual rst time to avoid checking. |
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ASSERT_I(__name, __prop) |
Macro bodies included by prim_assert.sv for tools that support full SystemVerilog and SVA syntax. See prim_assert.sv for documentation for each of the macros. |
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ASSERT_IF(__name, __prop, __enable, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
Assert that a property is true only when an enable signal is set. It can be called as a module (or interface) body item. |
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ASSERT_INIT(__name, __prop) |
Formal tools will ignore the initial construct, so use static assertion as a workaround. This workaround terminates design elaboration if the __prop predict is false. It calls $fatal() with the first argument equal to 2, it outputs the statistics about the memory and CPU time. |
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ASSERT_INIT_NET(__name, __prop) |
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ASSERT_KNOWN(__name, __sig, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
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ASSERT_KNOWN_IF(__name, __sig, __enable, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
Assert that signal has a known value (each bit is either '0' or '1') after reset if enable is set. It can be called as a module (or interface) body item. |
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ASSERT_NEVER(__name, __prop, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
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ASSERT_PRIM_COUNT_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_ =0, MAX_CYCLES_ =_SEC_CM_ALERT_MAX_CYC) |
////////////////////////////////////////////////////////////////////////////// Assertions for CMs that trigger alerts ////////////////////////////////////////////////////////////////////////////// |
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ASSERT_PRIM_COUNT_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_ =0, MAX_CYCLES_ =2, CLK_ =clk_i, RST_ =!rst_ni) |
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ASSERT_PRIM_DOUBLE_LFSR_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_ =0, MAX_CYCLES_ =_SEC_CM_ALERT_MAX_CYC) |
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ASSERT_PRIM_DOUBLE_LFSR_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_ =0, MAX_CYCLES_ =2, CLK_ =clk_i, RST_ =!rst_ni) |
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ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_ =0, MAX_CYCLES_ =_SEC_CM_ALERT_MAX_CYC) |
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ASSERT_PRIM_FSM_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_ =0, MAX_CYCLES_ =2, CLK_ =clk_i, RST_ =!rst_ni) |
////////////////////////////////////////////////////////////////////////////// Assertions for CMs that trigger some other form of error ////////////////////////////////////////////////////////////////////////////// |
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ASSERT_PRIM_ONEHOT_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_ =0, MAX_CYCLES_ =_SEC_CM_ALERT_MAX_CYC) |
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ASSERT_PRIM_ONEHOT_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_ =0, MAX_CYCLES_ =_SEC_CM_ALERT_MAX_CYC, CLK_ =clk_i, RST_ =!rst_ni) |
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ASSERT_PRIM_REG_WE_ONEHOT_ERROR_TRIGGER_ALERT(NAME_, REG_TOP_HIER_, ALERT_, GATE_ =0, MAX_CYCLES_ =_SEC_CM_ALERT_MAX_CYC) |
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ASSERT_PRIM_REG_WE_ONEHOT_ERROR_TRIGGER_ERR(NAME_, REG_TOP_HIER_, ERR_, GATE_ =0, MAX_CYCLES_ =_SEC_CM_ALERT_MAX_CYC, CLK_ =clk_i, RST_ =!rst_ni) |
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ASSERT_PULSE(__name, __sig, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
Assert that signal is an active-high pulse with pulse length of 1 clock cycle |
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ASSERT_STATIC_IN_PACKAGE(__name, __prop) |
Static assertions for checks inside SV packages. If the conditions is not true, this will trigger an error during elaboration. |
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ASSERT_STATIC_LINT_ERROR(__name, __prop) |
This macro is suitable for conditionally triggering lint errors, e.g., if a Sec parameter takes on a non-default value. This may be required for pre-silicon/FPGA evaluation but we don't want to allow this for tapeout. |
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ASSUME(__name, __prop, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
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ASSUME_FPV(__name, __prop, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
ASSUME_FPV Assume a concurrent property during formal verification only. |
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ASSUME_I(__name, __prop) |
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ASSUME_I_FPV(__name, __prop) |
ASSUME_I_FPV Assume a concurrent property during formal verification only. |
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CB |
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COVER(__name, __prop, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
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COVER_FPV(__name, __prop, __clk =ASSERT_DEFAULT_CLK, __rst =ASSERT_DEFAULT_RST) |
COVER_FPV Cover a concurrent property during formal verification |
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DEBUG_CSRS |
Debug related CSRs |
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DV_VIF_WRAP_GET_VIF(_IF, _VIF) |
To avoid race condition between the instant when an interface handle is set into the config db and the instant when it is retrieved (in the same time step, at t = 0), the macro below invokes uvm_config_db#(..)::wait_modified() to ensure that the retrieval is done only after the set. |
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DV_VIF_WRAP_GET_VIFS_BEGIN |
Enables the retrieval of individual vifs. The three macros below go together to define the _get_vifs() task in the extended class. |
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DV_VIF_WRAP_GET_VIFS_END |
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DV_VIF_WRAP_SET_VIF(_IF, _VIF, _LEVEL =0) |
Enable an interface to register itself (set its handle into the config db). Meant to be invoked from an interface. The macros invocation causes the interface to register itself into the uvm_resource_db pool. The derived class of dv_vif_wrap retrieves the handle to that interface handle from the uvm_resource db pool. SV LRM does not yet allow referencing the instance of an interface within itself as one
would in case of a class using the this keyword. However, most major simulators actually
support this in their own custom way. On VCS, a reference to self within the interface can be set
using _IF The SV interface _VIF: The corresponding virtual interface handle name _LEVEL: # of hierarchical levels the module to which the SV interface is bound, starting at the top level DUT instance. |
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IBEX_LOCKSTEP_PATH |
core_ibex_tb_top.dut.u_ibex_top.gen_lockstep.u_ibex_lockstep |
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IBEX_RF_PATH |
core_ibex_tb_top.dut.u_ibex_top.gen_regfile_ff.register_file_i |
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IGNORED_CSRS |
List of CSRs to ignore for coverage purposes. These CSRs are ignored as they are less critical and achieving full coverage isn't necessary. |
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M_FIELD_QDA_ENUM(TYPE, T, ARG, FLAG) |
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M_UVM_ARRAY_RESIZE(ARG, VAL) |
M_UVM_ARRAY_RESIZE |
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M_UVM_FIELD_DATA_AA_enum_key(KEY, ARG, FLAG) |
M_UVM_FIELD_DATA_AA_enum_key |
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M_UVM_FIELD_DATA_AA_generic(TYPE, KEY, ARG, FLAG) |
M_UVM_FIELD_DATA_AA_generic |
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M_UVM_FIELD_DATA_AA_int_key(KEY, ARG, FLAG) |
M_UVM_FIELD_DATA_AA_int_int |
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M_UVM_FIELD_DATA_AA_int_string(ARG, FLAG) |
M_UVM_FIELD_DATA_AA_int_string |
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M_UVM_FIELD_DATA_AA_object_int(ARG, FLAG) |
M_UVM_FIELD_DATA_AA_object_int |
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M_UVM_FIELD_DATA_AA_object_string(ARG, FLAG) |
M_UVM_FIELD_DATA_AA_object_string |
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M_UVM_FIELD_DATA_AA_string_string(ARG, FLAG) |
M_UVM_FIELD_DATA_AA_string_string |
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M_UVM_FIELD_QDA_INT(TYPE, ARG, FLAG) |
M_UVM_FIELD_QDA_INT |
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M_UVM_FIELD_QDA_OBJECT(TYPE, ARG, FLAG) |
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M_UVM_FIELD_QDA_STRING(TYPE, ARG, FLAG) |
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M_UVM_FIELD_SET_AA_INT_ENUMTYPE(INDEX_TYPE, ARRAY_TYPE, ARRAY, RHS, FLAG) |
M_UVM_FIELD_SET_AA_INT_ENUMTYPE |
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M_UVM_FIELD_SET_AA_INT_TYPE(INDEX_TYPE, ARRAY_TYPE, ARRAY, RHS, FLAG) |
M_UVM_FIELD_SET_AA_INT_TYPE |
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M_UVM_FIELD_SET_AA_OBJECT_TYPE(INDEX_TYPE, ARRAY, FLAG) |
M_UVM_FIELD_SET_AA_OBJECT_TYPE |
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M_UVM_FIELD_SET_AA_TYPE(INDEX_TYPE, ARRAY_TYPE, ARRAY, RHS, FLAG) |
M_UVM_FIELD_SET_AA_TYPE |
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M_UVM_QUEUE_RESIZE(ARG, VAL) |
M_UVM_QUEUE_RESIZE |
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M_UVM_SARRAY_RESIZE(ARG, VAL) |
M_UVM_SARRAY_RESIZE |
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OP_H |
31:16 |
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OP_L |
15:0 |
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PRIM_FLOP_A(__d, __q, __resval =PRIM_FLOP_RESVAL, __clk =PRIM_FLOP_CLK, __rst_n =PRIM_FLOP_RST) |
Register with asynchronous reset. |
|
PRIM_FLOP_CLK |
clk_i |
/////////////////////////////////// Default Values for Macros below // /////////////////////////////////// |
PRIM_FLOP_RESVAL |
'0 |
|
PRIM_FLOP_RST |
rst_ni |
|
PRIM_FLOP_SPARSE_FSM(__name, __d, __q, __type, __resval =PRIM_FLOP_RESVAL, __clk =PRIM_FLOP_CLK, __rst_n =PRIM_FLOP_RST, __alert_trigger_sva_en =1) |
Simulation tools typically infer FSMs and report coverage for these separately. However, tools like Xcelium and VCS seem to have problems inferring FSMs if the state register is not coded in a behavioral always_ff block in the same hierarchy. To that end, this uses a modified variant with a second behavioral register definition for RTL simulations so that FSMs can be inferred. Note that in this variant, the __q output is disconnected from prim_sparse_fsm_flop and attached to the behavioral flop. An assertion is added to ensure equivalence between the prim_sparse_fsm_flop output and the behavioral flop output in that case. |
|
PRIM_STRINGIFY(__x) |
"__x" |
Converts an arbitrary block of code into a Verilog string |
UVM_BLOCKING_GET_IMP(imp, TYPE, arg) |
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UVM_BLOCKING_GET_IMP_SFX(SFX, imp, TYPE, arg) |
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UVM_BLOCKING_GET_PEEK_IMP(imp, TYPE, arg) |
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UVM_BLOCKING_PEEK_IMP(imp, TYPE, arg) |
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UVM_BLOCKING_PEEK_IMP_SFX(SFX, imp, TYPE, arg) |
||
UVM_BLOCKING_PUT_IMP(imp, TYPE, arg) |
TLM imp implementations |
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UVM_BLOCKING_PUT_IMP_SFX(SFX, imp, TYPE, arg) |
These imps are used in uvm_port, uvm_export and uvm_*_imp, using suffixes |
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UVM_BLOCKING_TRANSPORT_IMP(imp, REQ, RSP, req_arg, rsp_arg) |
||
UVM_BLOCKING_TRANSPORT_IMP_SFX(SFX, imp, REQ, RSP, req_arg, rsp_arg) |
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UVM_DEFAULT_TIMEOUT |
9200s |
MACRO `UVM_DEFAULT_TIMEOUT The default timeout for simulation, if not overridden by <uvm_root::set_timeout> or <uvm_cmdline_processor::+UVM_TIMEOUT> |
UVM_EXPORT_COMMON(MASK, TYPE_NAME) |
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UVM_FUNCTION_ERROR |
"TLM interface function not implemented" |
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UVM_GET_IMP(imp, TYPE, arg) |
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UVM_GET_PEEK_IMP(imp, TYPE, arg) |
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UVM_IMP_COMMON(MASK, TYPE_NAME, IMP) |
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UVM_MAJOR_REV |
1 |
Macro UVM_MAJOR_REV Defines the MAJOR revision number. For UVM version 1.2, the MAJOR revision number is '1' `define UVM_MAJOR_REV 1 |
UVM_MAJOR_REV_1 |
Macro UVM_MAJOR_REV_1 Indicates that the MAJOR version of this release is '1'. `define UVM_MAJOR_REV_1 |
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UVM_MAJOR_VERSION_1_2 |
Undocumented, same thing as UVM_VERSION_1_2 |
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UVM_MINOR_REV |
2 |
Macro UVM_MINOR_REV Defines the MINOR revision number. For UVM version 1.2, the MINOR revision number is '2' `define UVM_MINOR_REV 2 |
UVM_MINOR_REV_2 |
Macro UVM_MINOR_REV_2 Indicates that the MINOR version of this release is '2'. `define UVM_MINOR_REV_2 |
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UVM_MS_IMP_COMMON(MASK, TYPE_NAME) |
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UVM_NAME |
UVM |
Macro UVM_NAME The name used by the library when displaying the name of the library. `define UVM_NAME UVM |
UVM_NONBLOCKING_GET_IMP(imp, TYPE, arg) |
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UVM_NONBLOCKING_GET_IMP_SFX(SFX, imp, TYPE, arg) |
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UVM_NONBLOCKING_GET_PEEK_IMP(imp, TYPE, arg) |
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UVM_NONBLOCKING_PEEK_IMP(imp, TYPE, arg) |
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UVM_NONBLOCKING_PEEK_IMP_SFX(SFX, imp, TYPE, arg) |
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UVM_NONBLOCKING_PUT_IMP(imp, TYPE, arg) |
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UVM_NONBLOCKING_PUT_IMP_SFX(SFX, imp, TYPE, arg) |
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UVM_NONBLOCKING_TRANSPORT_IMP(imp, REQ, RSP, req_arg, rsp_arg) |
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UVM_NONBLOCKING_TRANSPORT_IMP_SFX(SFX, imp, REQ, RSP, req_arg, rsp_arg) |
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UVM_PEEK_IMP(imp, TYPE, arg) |
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UVM_PH_TRACE(ID, MSG, PH, VERB) |
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UVM_PORT_COMMON(MASK, TYPE_NAME) |
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UVM_POST_VERSION_1_1 |
Macro UVM_POST_VERSION_1_1 Indicates that this version of the UVM came after the 1.1 versions, including the various 1.1 fix revisions. The first UVM version wherein this macro is defined is 1.2, and the macro will continue to be defined for all future revisions of the UVM library. `define UVM_POST_VERSION_1_1 |
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UVM_PUT_IMP(imp, TYPE, arg) |
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UVM_RESOURCE_GET_FCNS(base_type) |
When specicializing resources the get_by_name and get_by_type functions must be redefined. The reason is that the version of these functions in the base class (uvm_resource#(T)) returns an object of type uvm_resource#(T). In the specializations we must return an object of the type of the specialization. So, we call the base_class implementation of these functions and then downcast to the subtype. This macro is invokved once in each where a resource specialization is a class defined as: class where typedef where |
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UVM_SEQ_ITEM_FUNCTION_ERROR |
"Sequencer interface function not implemented" |
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UVM_SEQ_ITEM_GET_MASK |
(1<<7) |
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UVM_SEQ_ITEM_GET_NEXT_ITEM_MASK |
(1<<0) |
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UVM_SEQ_ITEM_HAS_DO_AVAILABLE_MASK |
(1<<3) |
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UVM_SEQ_ITEM_ITEM_DONE_MASK |
(1<<2) |
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UVM_SEQ_ITEM_PEEK_MASK |
(1<<8) |
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UVM_SEQ_ITEM_PULL_IMP(imp, REQ, RSP, req_arg, rsp_arg) |
imp definitions |
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UVM_SEQ_ITEM_PULL_MASK |
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UVM_SEQ_ITEM_PUSH_MASK |
(UVM_SEQ_ITEM_PUT_MASK) |
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UVM_SEQ_ITEM_PUT_MASK |
(1<<6) |
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UVM_SEQ_ITEM_PUT_RESPONSE_MASK |
(1<<5) |
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UVM_SEQ_ITEM_TASK_ERROR |
"Sequencer interface task not implemented" |
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UVM_SEQ_ITEM_TRY_NEXT_ITEM_MASK |
(1<<1) |
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UVM_SEQ_ITEM_UNI_PULL_MASK |
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UVM_SEQ_ITEM_WAIT_FOR_SEQUENCES_MASK |
(1<<4) |
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UVM_SEQ_PORT(MASK, TYPE_NAME) |
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UVM_STRING_QUEUE_STREAMING_PACK(q) |
uvm_pkg::m_uvm_string_queue_join(q) |
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UVM_TASK_ERROR |
"TLM interface task not implemented" |
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UVM_TLM_ANALYSIS_MASK |
(1<<8) |
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UVM_TLM_BLOCKING_GET_MASK |
(1<<1) |
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UVM_TLM_BLOCKING_GET_PEEK_MASK |
(UVM_TLM_BLOCKING_GET_MASK | UVM_TLM_BLOCKING_PEEK_MASK) |
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UVM_TLM_BLOCKING_MASTER_MASK |
(UVM_TLM_BLOCKING_PUT_MASK | UVM_TLM_BLOCKING_GET_MASK | UVM_TLM_BLOCKING_PEEK_MASK | UVM_TLM_MASTER_BIT_MASK) |
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UVM_TLM_BLOCKING_PEEK_MASK |
(1<<2) |
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UVM_TLM_BLOCKING_PUT_MASK |
(1<<0) |
primitive interfaces |
UVM_TLM_BLOCKING_SLAVE_MASK |
(UVM_TLM_BLOCKING_PUT_MASK | UVM_TLM_BLOCKING_GET_MASK | UVM_TLM_BLOCKING_PEEK_MASK | UVM_TLM_SLAVE_BIT_MASK) |
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UVM_TLM_BLOCKING_TRANSPORT_MASK |
(1<<3) |
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UVM_TLM_B_MASK |
(1<<2) |
MACRO `UVM_TLM_B_MASK Define blocking mask onehot assignment = 'b100 |
UVM_TLM_B_TRANSPORT_IMP(imp, T, t, delay) |
Macro `UVM_TLM_B_TRANSPORT_IMP The macro wraps the function b_transport() Execute a blocking transaction. Once this method returns, the transaction is assumed to have been executed. Whether that execution is successful or not must be indicated by the transaction itself. The callee may modify or update the transaction object, subject to any constraints imposed by the transaction class. The initiator may re-use a transaction object from one call to the next and across calls to b_transport(). The call to b_transport shall mark the first timing point of the transaction. The return from b_transport() shall mark the final timing point of the transaction. The timing annotation argument allows the timing points to be offset from the simulation times at which the task call and return are executed. |
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UVM_TLM_FIFO_FUNCTION_ERROR |
"fifo channel function not implemented" |
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UVM_TLM_FIFO_TASK_ERROR |
"fifo channel task not implemented" |
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UVM_TLM_FUNCTION_ERROR |
"TLM-2 interface function not implemented" |
MACRO `UVM_TLM_FUNCTION_ERROR Defines Not-Yet-Implemented TLM functions |
UVM_TLM_GET_MASK |
(UVM_TLM_BLOCKING_GET_MASK | UVM_TLM_NONBLOCKING_GET_MASK) |
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UVM_TLM_GET_PEEK_MASK |
(UVM_TLM_GET_MASK | UVM_TLM_PEEK_MASK) |
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UVM_TLM_GET_TYPE_NAME(NAME) |
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UVM_TLM_MASTER_BIT_MASK |
(1<<9) |
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UVM_TLM_MASTER_MASK |
(UVM_TLM_BLOCKING_MASTER_MASK | UVM_TLM_NONBLOCKING_MASTER_MASK) |
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UVM_TLM_NB_BW_MASK |
(1<<1) |
MACRO `UVM_TLM_NB_BW_MASK Define Non blocking backward mask onehot assignment = 'b010 |
UVM_TLM_NB_FW_MASK |
(1<<0) |
MACRO `UVM_TLM_NB_FW_MASK Define Non blocking Forward mask onehot assignment = 'b001 |
UVM_TLM_NB_TRANSPORT_BW_IMP(imp, T, P, t, p, delay) |
Macro `UVM_TLM_NB_TRANSPORT_BW_IMP Implementation of the backward path. The macro wraps the function called nb_transport_bw(). This function MUST be implemented in the INITIATOR component class. Every call to this method may mark a timing point, including the final timing point, in the execution of the transaction. The timing annotation argument allows the timing point to be offset from the simulation times at which the backward path is used. The final timing point of a transaction may be marked by a call to nb_transport_fw() within [`UVM_TLM_NB_TRANSPORT_FW_IMP](./index-macros.html#macros) or a return from this or subsequent call to nb_transport_bw(). See <TLM2 Interfaces, Ports, Exports and Transport Interfaces Subset> for more details on the semantics and rules of the nonblocking transport interface. Example: class master extends uvm_component;
uvm_tlm_nb_initiator_socket
#(trans, uvm_tlm_phase_e, this_t) initiator_socket;
function void build_phase(uvm_phase phase);
initiator_socket = new("initiator_socket", this, this);
endfunction
function uvm_tlm_sync_e nb_transport_bw(trans t,
ref uvm_tlm_phase_e p,
input uvm_tlm_time delay);
transaction = t;
state = p;
return UVM_TLM_ACCEPTED;
endfunction
...
endclass
|
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UVM_TLM_NB_TRANSPORT_FW_IMP(imp, T, P, t, p, delay) |
Macro `UVM_TLM_NB_TRANSPORT_FW_IMP The macro wraps the forward path call function nb_transport_fw() The first call to this method for a transaction marks the initial timing point. Every call to this method may mark a timing point in the execution of the transaction. The timing annotation argument allows the timing points to be offset from the simulation times at which the forward path is used. The final timing point of a transaction may be marked by a call to nb_transport_bw() within [`UVM_TLM_NB_TRANSPORT_BW_IMP](./index-macros.html#macros) or a return from this or subsequent call to nb_transport_fw(). See <TLM2 Interfaces, Ports, Exports and Transport Interfaces Subset> for more details on the semantics and rules of the nonblocking transport interface. |
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UVM_TLM_NONBLOCKING_GET_MASK |
(1<<5) |
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UVM_TLM_NONBLOCKING_GET_PEEK_MASK |
(UVM_TLM_NONBLOCKING_GET_MASK | UVM_TLM_NONBLOCKING_PEEK_MASK) |
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UVM_TLM_NONBLOCKING_MASTER_MASK |
(UVM_TLM_NONBLOCKING_PUT_MASK | UVM_TLM_NONBLOCKING_GET_MASK | UVM_TLM_NONBLOCKING_PEEK_MASK | UVM_TLM_MASTER_BIT_MASK) |
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UVM_TLM_NONBLOCKING_PEEK_MASK |
(1<<6) |
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UVM_TLM_NONBLOCKING_PUT_MASK |
(1<<4) |
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UVM_TLM_NONBLOCKING_SLAVE_MASK |
(UVM_TLM_NONBLOCKING_PUT_MASK | UVM_TLM_NONBLOCKING_GET_MASK | UVM_TLM_NONBLOCKING_PEEK_MASK | UVM_TLM_SLAVE_BIT_MASK) |
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UVM_TLM_NONBLOCKING_TRANSPORT_MASK |
(1<<7) |
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UVM_TLM_PEEK_MASK |
(UVM_TLM_BLOCKING_PEEK_MASK | UVM_TLM_NONBLOCKING_PEEK_MASK) |
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UVM_TLM_PUT_MASK |
(UVM_TLM_BLOCKING_PUT_MASK | UVM_TLM_NONBLOCKING_PUT_MASK) |
combination interfaces |
UVM_TLM_SLAVE_BIT_MASK |
(1<<10) |
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UVM_TLM_SLAVE_MASK |
(UVM_TLM_BLOCKING_SLAVE_MASK | UVM_TLM_NONBLOCKING_SLAVE_MASK) |
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UVM_TLM_TASK_ERROR |
"TLM-2 interface task not implemented" |
MACRO `UVM_TLM_TASK_ERROR Defines Not-Yet-Implemented TLM tasks |
UVM_TLM_TRANSPORT_MASK |
(UVM_TLM_BLOCKING_TRANSPORT_MASK | UVM_TLM_NONBLOCKING_TRANSPORT_MASK) |
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UVM_TRANSPORT_IMP(imp, REQ, RSP, req_arg, rsp_arg) |
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UVM_VERSION_1_2 |
Macro UVM_VERSION_1_2 Indicates that the version of this release is '1.2'. `define UVM_VERSION_1_2 |
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UVM_VERSION_STRING |
"UVM_NAME-UVM_MAJOR_REV.UVM_MINOR_REV" |
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WAIT_FOR_RESET |
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_N |
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_SEC_CM_ALERT_MAX_CYC |
30 |
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m_uvm_bottomup_phase(PHASE, COMP, PREFIX) |
PREFIX |
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m_uvm_component_registry_internal(T, S) |
This is needed due to an issue in of passing down strings created by args to lower level macros. |
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m_uvm_component_registry_param(T) |
m_uvm_component_registry_param |
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m_uvm_get_type_name_func(T) |
m_uvm_get_type_name_func |
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m_uvm_object_create_func(T) |
m_uvm_object_create_func |
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m_uvm_object_registry_internal(T, S) |
This is needed due to an issue in of passing down strings created by args to lower level macros. |
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m_uvm_object_registry_param(T) |
m_uvm_object_registry_param |
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m_uvm_print_int(ARG, FLAG) |
Purpose provide print functionality for a specific integral field. This macro is available for user access. If used externally, a record_options object must be avaialble and must have the name opt. Postcondition ARG is printed using the format set by the FLAGS. |
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m_uvm_record_int(ARG, FLAG) |
Purpose provide record functionality for a specific integral field. This macro is available for user access. If used externally, a record_options object must be avaialble and must have the name opt. Postcondition ARG is printed using the format set by the FLAGS. |
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m_uvm_record_object(ARG, FLAG) |
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m_uvm_record_qda_enum(ARG, FLAG, SZ) |
m_uvm_record_qda_enum |
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m_uvm_record_qda_int(ARG, FLAG, SZ) |
m_uvm_record_qda_int |
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m_uvm_record_qda_object(ARG, FLAG, SZ) |
m_uvm_record_qda_object |
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m_uvm_record_qda_string(ARG, FLAG, SZ) |
m_uvm_record_qda_string |
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m_uvm_record_string(ARG, STR, FLAG) |
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m_uvm_register_sequence(TYPE_NAME, SEQUENCER) |
DEPRECATED *** Group- Sequence Registration Macros The sequence-specific macros perform the same function as the set of `uvm_object_*_utils macros, except they also set the default sequencer type the sequence will run on. |
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m_uvm_task_phase(PHASE, COMP, PREFIX) |
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m_uvm_topdown_phase(PHASE, COMP, PREFIX) |
PREFIX |
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uvm_add_to_seq_lib(TYPE, LIBTYPE) |
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uvm_analysis_imp_decl(SFX) |
MACRO `uvm_analysis_imp_decl `uvm_analysis_imp_decl(SFX) Define the class uvm_analysis_impSFX for providing an analysis implementation. SFX is the suffix for the new class type. The analysis implementation is the write function. The `uvm_analysis_imp_decl allows for a scoreboard (or other analysis component) to support input from many places. For example: `uvm_analysis_imp_decl(_ingress)
`uvm_analysis_imp_decl(_egress)
class myscoreboard extends uvm_component;
uvm_analysis_imp_ingress#(mydata, myscoreboard) ingress;
uvm_analysis_imp_egress#(mydata, myscoreboard) egress;
mydata ingress_list[$];
...
function new(string name, uvm_component parent);
super.new(name,parent);
ingress = new("ingress", this);
egress = new("egress", this);
endfunction
function void write_ingress(mydata t);
ingress_list.push_back(t);
endfunction
function void write_egress(mydata t);
find_match_in_ingress_list(t);
endfunction
function void find_match_in_ingress_list(mydata t);
//implement scoreboarding for this particular DUT
...
endfunction
endclass
|
|
uvm_blocking_get_imp_decl(SFX) |
MACRO `uvm_blocking_get_imp_decl `uvm_blocking_get_imp_decl(SFX) Define the class uvm_blocking_get_impSFX for providing blocking get implementations. SFX is the suffix for the new class type. |
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uvm_blocking_get_peek_imp_decl(SFX) |
MACRO `uvm_blocking_get_peek_imp_decl `uvm_blocking_get_peek_imp_decl(SFX) Define the class uvm_blocking_get_peek_impSFX for providing the blocking get_peek implementation. |
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uvm_blocking_master_imp_decl(SFX) |
MACRO `uvm_blocking_master_imp_decl `uvm_blocking_master_imp_decl(SFX) Define the class uvm_blocking_master_impSFX for providing the blocking master implementation. |
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uvm_blocking_peek_imp_decl(SFX) |
MACRO `uvm_blocking_peek_imp_decl `uvm_blocking_peek_imp_decl(SFX) Define the class uvm_blocking_peek_impSFX for providing blocking peek implementations. SFX is the suffix for the new class type. |
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uvm_blocking_put_imp_decl(SFX) |
MACRO `uvm_blocking_put_imp_decl `uvm_blocking_put_imp_decl(SFX) Define the class uvm_blocking_put_impSFX for providing blocking put implementations. SFX is the suffix for the new class type. |
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uvm_blocking_slave_imp_decl(SFX) |
MACRO `uvm_blocking_slave_imp_decl `uvm_blocking_slave_imp_decl(SFX) Define the class uvm_blocking_slave_impSFX for providing the blocking slave implementation. |
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uvm_blocking_transport_imp_decl(SFX) |
MACRO `uvm_blocking_transport_imp_decl `uvm_blocking_transport_imp_decl(SFX) Define the class uvm_blocking_transport_impSFX for providing the blocking transport implementation. |
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uvm_builtin_bottomup_phase(PHASE) |
||
uvm_builtin_task_phase(PHASE) |
PREFIX |
|
uvm_builtin_topdown_phase(PHASE) |
||
uvm_cb_trace(OBJ, CB, OPER) |
/* null */ |
|
uvm_cb_trace_noobj(CB, OPER) |
/* null */ |
|
uvm_component_param_utils(T) |
||
uvm_component_param_utils_begin(T) |
||
uvm_component_registry(T, S) |
MACRO `uvm_component_registry Registers a uvm_component-based class with the factory `uvm_component_registry(T,S) Registers a uvm_component-based class T and lookup string S with the factory. S typically is the name of the class in quotes. The [`uvm_object_utils](./index-macros.html#macros) family of macros uses this macro. |
|
uvm_component_utils(T) |
MACRO `uvm_component_end uvm_component-based class declarations may contain one of the above forms of utility macros. For simple components with no field macros, use `uvm_component_utils(TYPE) For simple components with field macros, use `uvm_component_utils_begin(TYPE)
`uvm_field_* macro invocations here
`uvm_component_utils_end
For parameterized components with no field macros, use `uvm_component_param_utils(TYPE) For parameterized components with field macros, use `uvm_component_param_utils_begin(TYPE)
`uvm_field_* macro invocations here
`uvm_component_utils_end
Simple (non-parameterized) components must use the uvm_components_utils* versions, which do the following:
Parameterized classes must use the uvm_object_param_utils* versions. They differ from `uvm_object_utils only in that they do not supply a type name when registering the object with the factory. As such, name-based lookup with the factory for parameterized classes is not possible. The macros with _begin suffixes are the same as the non-suffixed versions
except that they also start a block in which |
|
uvm_component_utils_begin(T) |
||
uvm_component_utils_end |
||
uvm_create(SEQ_OR_ITEM) |
MACRO `uvm_create `uvm_create(SEQ_OR_ITEM) This action creates the item or sequence using the factory. It intentionally does zero processing. After this action completes, the user can manually set values, manipulate rand_mode and constraint_mode, etc. |
|
uvm_create_on(SEQ_OR_ITEM, SEQR) |
MACRO `uvm_create_on `uvm_create_on(SEQ_OR_ITEM, SEQR) This is the same as [`uvm_create](./index-macros.html#macros) except that it also sets the parent sequence to the sequence in which the macro is invoked, and it sets the sequencer to the specified SEQR argument. |
|
uvm_create_seq(UVM_SEQ, SEQR_CONS_IF) |
||
uvm_declare_p_sequencer(SEQUENCER) |
MACRO `uvm_declare_p_sequencer This macro is used to declare a variable p_sequencer whose type is specified by SEQUENCER . `uvm_declare_p_sequencer(SEQUENCER) The example below shows using the `uvm_declare_p_sequencer macro along with the uvm_object_utils macros to set up the sequence but not register the sequence in the sequencer's library. class mysequence extends uvm_sequence#(mydata);
`uvm_object_utils(mysequence)
`uvm_declare_p_sequencer(some_seqr_type)
task body;
//Access some variable in the user's custom sequencer
if(p_sequencer.some_variable) begin
...
end
endtask
endclass
|
|
uvm_declare_sequence_lib |
DEPRECATED *** Group- Sequencer Registration Macros The sequencer-specific macros perform the same function as the set of `uvm_componenent_*utils macros except that they also declare the plumbing necessary for creating the sequencer's sequence library. |
|
uvm_delay(TIME) |
#(TIME); |
|
uvm_do(SEQ_OR_ITEM) |
MACRO `uvm_do `uvm_do(SEQ_OR_ITEM) This macro takes as an argument a uvm_sequence_item variable or object. The argument is created using [`uvm_create](./index-macros.html#macros) if necessary, then randomized. In the case of an item, it is randomized after the call to <uvm_sequence_base::start_item()> returns. This is called late-randomization. In the case of a sequence, the sub-sequence is started using <uvm_sequence_base::start()> with call_pre_post set to 0. In the case of an item, the item is sent to the driver through the associated sequencer. For a sequence item, the following are called, in order | `uvm_create(item) sequencer.wait_for_grant(prior) (task) this.pre_do(1) (task) item.randomize() this.mid_do(item) (func) sequencer.send_request(item) (func) sequencer.wait_for_item_done() (task) this.post_do(item) (func) For a sequence, the following are called, in order | `uvm_create(sub_seq) sub_seq.randomize() sub_seq.pre_start() (task) this.pre_do(0) (task) this.mid_do(sub_seq) (func) sub_seq.body() (task) this.post_do(sub_seq) (func) sub_seq.post_start() (task) |
|
uvm_do_callbacks(T, CB, METHOD) |
||
uvm_do_callbacks_exit_on(T, CB, METHOD, VAL) |
||
uvm_do_obj_callbacks(T, CB, OBJ, METHOD) |
MACRO `uvm_do_obj_callbacks `uvm_do_obj_callbacks(T,CB,OBJ,METHOD) Calls the given METHOD of all callbacks based on type CB registered with the given object, OBJ , which is or is based on type T . This macro is identical to [`uvm_do_callbacks](./index-macros.html#macros) macro, but it has an additional OBJ argument to allow the specification of an external object to associate the callback with. For example, if the callbacks are being applied in a sequence, OBJ could be specified as the associated sequencer or parent sequence. ...
`uvm_do_callbacks(mycb, mycomp, seqr, my_function(seqr, curr_addr, curr_data))
...
|
|
uvm_do_obj_callbacks_exit_on(T, CB, OBJ, METHOD, VAL) |
MACRO `uvm_do_obj_callbacks_exit_on `uvm_do_obj_callbacks_exit_on(T,CB,OBJ,METHOD,VAL) Calls the given METHOD of all callbacks of type CB registered with the given object OBJ , which must be or be based on type T , and returns upon the first callback that returns the bit value given by VAL . It is exactly the same as the [`uvm_do_callbacks_exit_on](./index-macros.html#macros) but has a specific object instance (instead of the implicit this instance) as the third argument. ... // Exit if a callback returns a 1 `uvm_do_callbacks_exit_on(mycomp, mycb, seqr, drop_trans(seqr,trans), 1) ... Because this macro calls return , its use is restricted to implementations of functions that return a bit value, as in the above example. |
|
uvm_do_on(SEQ_OR_ITEM, SEQR) |
MACRO `uvm_do_on `uvm_do_on(SEQ_OR_ITEM, SEQR) This is the same as [`uvm_do](./index-macros.html#macros) except that it also sets the parent sequence to the sequence in which the macro is invoked, and it sets the sequencer to the specified SEQR argument. |
|
uvm_do_on_pri(SEQ_OR_ITEM, SEQR, PRIORITY) |
MACRO `uvm_do_on_pri `uvm_do_on_pri(SEQ_OR_ITEM, SEQR, PRIORITY) This is the same as [`uvm_do_pri](./index-macros.html#macros) except that it also sets the parent sequence to the sequence in which the macro is invoked, and it sets the sequencer to the specified SEQR argument. |
|
uvm_do_on_pri_with(SEQ_OR_ITEM, SEQR, PRIORITY, CONSTRAINTS) |
MACRO `uvm_do_on_pri_with `uvm_do_on_pri_with(SEQ_OR_ITEM, SEQR, PRIORITY, CONSTRAINTS) This is the same as `uvm_do_pri_with except that it also sets the parent sequence to the sequence in which the macro is invoked, and it sets the sequencer to the specified SEQR argument. |
|
uvm_do_on_with(SEQ_OR_ITEM, SEQR, CONSTRAINTS) |
MACRO `uvm_do_on_with `uvm_do_on_with(SEQ_OR_ITEM, SEQR, CONSTRAINTS) This is the same as [`uvm_do_with](./index-macros.html#macros) except that it also sets the parent sequence to the sequence in which the macro is invoked, and it sets the sequencer to the specified SEQR argument. The user must supply brackets around the constraints. |
|
uvm_do_pri(SEQ_OR_ITEM, PRIORITY) |
MACRO `uvm_do_pri `uvm_do_pri(SEQ_OR_ITEM, PRIORITY) This is the same as `uvm_do except that the sequence item or sequence is executed with the priority specified in the argument |
|
uvm_do_pri_with(SEQ_OR_ITEM, PRIORITY, CONSTRAINTS) |
MACRO `uvm_do_pri_with `uvm_do_pri_with(SEQ_OR_ITEM, PRIORITY, CONSTRAINTS) This is the same as `uvm_do_pri except that the given constraint block is applied to the item or sequence in a randomize with statement before execution. |
|
uvm_do_seq(UVM_SEQ, SEQR_CONS_IF) |
||
uvm_do_seq_with(UVM_SEQ, SEQR_CONS_IF, CONSTRAINTS) |
||
uvm_do_with(SEQ_OR_ITEM, CONSTRAINTS) |
MACRO `uvm_do_with `uvm_do_with(SEQ_OR_ITEM, CONSTRAINTS) This is the same as `uvm_do except that the constraint block in the 2nd argument is applied to the item or sequence in a randomize with statement before execution. |
|
uvm_end_package |
||
uvm_error(ID, MSG) |
MACRO `uvm_error Calls uvm_report_error with a verbosity of UVM_NONE. The message cannot be turned off using the reporter's verbosity setting, but can be turned off by setting the action for the message. ID is given as the message tag and MSG is given as the message text. The file and line are also sent to the uvm_report_error call. `uvm_error(ID, MSG) |
|
uvm_error_begin(ID, MSG, RM =__uvm_msg) |
MACRO `uvm_error_begin `uvm_error_begin(ID, MSG, RM = __uvm_msg) |
|
uvm_error_context(ID, MSG, RO) |
MACRO `uvm_error_context `uvm_error_context(ID, MSG, RO) Operates identically to `uvm_error but requires that the
context, or |
|
uvm_error_context_begin(ID, MSG, RO, RM =__uvm_msg) |
MACRO `uvm_error_context_begin `uvm_error_context_begin(ID, MSG, RO, RM = __uvm_msg) |
|
uvm_error_context_end |
MACRO `uvm_error_context_end `uvm_error_context_end This macro pair operates identically to |
|
uvm_error_end |
MACRO `uvm_error_end This macro pair operates identically to `uvm_error_end The usage shown in [`uvm_info_end](./index-macros.html#macros) works identically for this pair. |
|
uvm_fatal(ID, MSG) |
MACRO `uvm_fatal Calls uvm_report_fatal with a verbosity of UVM_NONE. The message cannot be turned off using the reporter's verbosity setting, but can be turned off by setting the action for the message. ID is given as the message tag and MSG is given as the message text. The file and line are also sent to the uvm_report_fatal call. `uvm_fatal(ID, MSG) |
|
uvm_fatal_begin(ID, MSG, RM =__uvm_msg) |
MACRO `uvm_fatal_begin `uvm_fatal_begin(ID, MSG, RM = __uvm_msg) |
|
uvm_fatal_context(ID, MSG, RO) |
MACRO `uvm_fatal_context `uvm_fatal_context(ID, MSG, RO) Operates identically to `uvm_fatal but requires that the
context, or |
|
uvm_fatal_context_begin(ID, MSG, RO, RM =__uvm_msg) |
MACRO `uvm_fatal_context_begin `uvm_fatal_context_begin(ID, MSG, RO, RM = __uvm_msg) |
|
uvm_fatal_context_end |
MACRO `uvm_fatal_context_end `uvm_fatal_context_end This macro pair operates identically to |
|
uvm_fatal_end |
MACRO `uvm_fatal_end This macro pair operates identically to `uvm_fatal_end The usage shown in [`uvm_info_end](./index-macros.html#macros) works identically for this pair. |
|
uvm_field_aa_int_byte(ARG, FLAG) |
MACRO `uvm_field_aa_int_byte Implements the data operations for an associative array of integral types indexed by the byte data type. `uvm_field_aa_int_byte(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with byte key, and FLAG is a bitwise OR of one or more flag settings as
described in |
|
uvm_field_aa_int_byte_unsigned(ARG, FLAG) |
MACRO `uvm_field_aa_int_byte_unsigned Implements the data operations for an associative array of integral types indexed by the byte unsigned data type. `uvm_field_aa_int_byte_unsigned(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with byte unsigned key, and FLAG is a bitwise OR of one or more flag
settings as described in |
|
uvm_field_aa_int_enumkey(KEY, ARG, FLAG) |
MACRO `uvm_field_aa_int_enumkey Implements the data operations for an associative array of integral types indexed by any enumeration key data type. `uvm_field_aa_int_enumkey(KEY, ARG,FLAG) KEY is the enumeration type of the key, ARG is the name of a property
that is an associative array of integrals, and FLAG is a bitwise OR of one
or more flag settings as described in |
|
uvm_field_aa_int_int(ARG, FLAG) |
MACRO `uvm_field_aa_int_int Implements the data operations for an associative array of integral types indexed by the int data type. `uvm_field_aa_int_int(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with int key, and FLAG is a bitwise OR of one or more flag settings as
described in |
|
uvm_field_aa_int_int_unsigned(ARG, FLAG) |
MACRO `uvm_field_aa_int_int_unsigned Implements the data operations for an associative array of integral types indexed by the int unsigned data type. `uvm_field_aa_int_int_unsigned(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with int unsigned key, and FLAG is a bitwise OR of one or more flag
settings as described in |
|
uvm_field_aa_int_integer(ARG, FLAG) |
MACRO `uvm_field_aa_int_integer Implements the data operations for an associative array of integral types indexed by the integer data type. `uvm_field_aa_int_integer(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with integer key, and FLAG is a bitwise OR of one or more flag settings
as described in |
|
uvm_field_aa_int_integer_unsigned(ARG, FLAG) |
MACRO `uvm_field_aa_int_integer_unsigned Implements the data operations for an associative array of integral types indexed by the integer unsigned data type. `uvm_field_aa_int_integer_unsigned(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with integer unsigned key, and FLAG is a bitwise OR of one or more
flag settings as described in |
|
uvm_field_aa_int_key(KEY, ARG, FLAG) |
MACRO `uvm_field_aa_int_key Implements the data operations for an associative array of integral types indexed by any integral key data type. `uvm_field_aa_int_key(KEY,ARG,FLAG) KEY is the data type of the integral key, ARG is the name of a property
that is an associative array of integrals, and FLAG is a bitwise OR of one
or more flag settings as described in |
|
uvm_field_aa_int_longint(ARG, FLAG) |
MACRO `uvm_field_aa_int_longint Implements the data operations for an associative array of integral types indexed by the longint data type. `uvm_field_aa_int_longint(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with longint key, and FLAG is a bitwise OR of one or more flag settings
as described in |
|
uvm_field_aa_int_longint_unsigned(ARG, FLAG) |
MACRO `uvm_field_aa_int_longint_unsigned Implements the data operations for an associative array of integral types indexed by the longint unsigned data type. `uvm_field_aa_int_longint_unsigned(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with longint unsigned key, and FLAG is a bitwise OR of one or more
flag settings as described in |
|
uvm_field_aa_int_shortint(ARG, FLAG) |
MACRO `uvm_field_aa_int_shortint Implements the data operations for an associative array of integral types indexed by the shortint data type. `uvm_field_aa_int_shortint(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with shortint key, and FLAG is a bitwise OR of one or more flag
settings as described in |
|
uvm_field_aa_int_shortint_unsigned(ARG, FLAG) |
MACRO `uvm_field_aa_int_shortint_unsigned Implements the data operations for an associative array of integral types indexed by the shortint unsigned data type. `uvm_field_aa_int_shortint_unsigned(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with shortint unsigned key, and FLAG is a bitwise OR of one or more
flag settings as described in |
|
uvm_field_aa_int_string(ARG, FLAG) |
MACRO `uvm_field_aa_int_string Implements the data operations for an associative array of integrals indexed by string . `uvm_field_aa_int_string(ARG,FLAG) ARG is the name of a property that is an associative array of integrals
with string key, and FLAG is a bitwise OR of one or more flag settings as
described in |
|
uvm_field_aa_object_int(ARG, FLAG) |
MACRO `uvm_field_aa_object_int Implements the data operations for an associative array of `uvm_field_aa_object_int(ARG,FLAG) ARG is the name of a property that is an associative array of objects
with int key, and FLAG is a bitwise OR of one or more flag settings as
described in |
|
uvm_field_aa_object_string(ARG, FLAG) |
MACRO `uvm_field_aa_object_string Implements the data operations for an associative array of `uvm_field_aa_object_string(ARG,FLAG) ARG is the name of a property that is an associative array of objects
with string key, and FLAG is a bitwise OR of one or more flag settings as
described in |
|
uvm_field_aa_string_string(ARG, FLAG) |
MACRO `uvm_field_aa_string_string Implements the data operations for an associative array of strings indexed by string . `uvm_field_aa_string_string(ARG,FLAG) ARG is the name of a property that is an associative array of strings
with string key, and FLAG is a bitwise OR of one or more flag settings as
described in |
|
uvm_field_array_enum(T, ARG, FLAG) |
MACRO `uvm_field_array_enum Implements the data operations for a one-dimensional dynamic array of enums. `uvm_field_array_enum(T,ARG,FLAG) T is a one-dimensional dynamic array of enums type,
ARG is an instance of that type, and FLAG is a bitwise OR of
one or more flag settings as described in |
|
uvm_field_array_int(ARG, FLAG) |
MACRO `uvm_field_array_int Implements the data operations for a one-dimensional dynamic array of integrals. `uvm_field_array_int(ARG,FLAG) ARG is a one-dimensional dynamic array of integrals,
and FLAG is a bitwise OR of one or more flag settings as described in
|
|
uvm_field_array_object(ARG, FLAG) |
MACRO `uvm_field_array_object Implements the data operations for a one-dimensional dynamic array
of `uvm_field_array_object(ARG,FLAG) ARG is a one-dimensional dynamic array of |
|
uvm_field_array_string(ARG, FLAG) |
MACRO `uvm_field_array_string Implements the data operations for a one-dimensional dynamic array of strings. `uvm_field_array_string(ARG,FLAG) ARG is a one-dimensional dynamic array of strings, and FLAG is a bitwise
OR of one or more flag settings as described in |
|
uvm_field_enum(T, ARG, FLAG) |
MACRO `uvm_field_enum Implements the data operations for an enumerated property. `uvm_field_enum(T,ARG,FLAG) T is an enumerated type, ARG is an instance of that type, and
FLAG is a bitwise OR of one or more flag settings as described in
|
|
uvm_field_event(ARG, FLAG) |
MACRO `uvm_field_event Implements the data operations for an event property. `uvm_field_event(ARG,FLAG) ARG is an event property of the class, and FLAG is a bitwise OR of
one or more flag settings as described in |
|
uvm_field_int(ARG, FLAG) |
MACRO `uvm_field_int Implements the data operations for any packed integral property. `uvm_field_int(ARG,FLAG) ARG is an integral property of the class, and FLAG is a bitwise OR of
one or more flag settings as described in |
|
uvm_field_object(ARG, FLAG) |
MACRO `uvm_field_object Implements the data operations for a `uvm_field_object(ARG,FLAG) ARG is an object property of the class, and FLAG is a bitwise OR of
one or more flag settings as described in |
|
uvm_field_queue_enum(T, ARG, FLAG) |
MACRO `uvm_field_queue_enum Implements the data operations for a one-dimensional queue of enums. `uvm_field_queue_enum(T,ARG,FLAG) T is a queue of enums type, ARG is an instance of that type,
and FLAG is a bitwise OR of one or more flag settings as described
in |
|
uvm_field_queue_int(ARG, FLAG) |
MACRO `uvm_field_queue_int Implements the data operations for a queue of integrals. `uvm_field_queue_int(ARG,FLAG) ARG is a one-dimensional queue of integrals,
and FLAG is a bitwise OR of one or more flag settings as described in
|
|
uvm_field_queue_object(ARG, FLAG) |
MACRO `uvm_field_queue_object Implements the data operations for a queue of `uvm_field_queue_object(ARG,FLAG) ARG is a one-dimensional queue of |
|
uvm_field_queue_string(ARG, FLAG) |
MACRO `uvm_field_queue_string Implements the data operations for a queue of strings. `uvm_field_queue_string(ARG,FLAG) ARG is a one-dimensional queue of strings, and FLAG is a bitwise
OR of one or more flag settings as described in |
|
uvm_field_real(ARG, FLAG) |
MACRO `uvm_field_real Implements the data operations for any real property. `uvm_field_real(ARG,FLAG) ARG is an real property of the class, and FLAG is a bitwise OR of
one or more flag settings as described in |
|
uvm_field_sarray_enum(T, ARG, FLAG) |
MACRO `uvm_field_sarray_enum Implements the data operations for a one-dimensional static array of enums. `uvm_field_sarray_enum(T,ARG,FLAG) T is a one-dimensional dynamic array of enums type, ARG is an
instance of that type, and FLAG is a bitwise OR of one or more flag
settings as described in |
|
uvm_field_sarray_int(ARG, FLAG) |
MACRO `uvm_field_sarray_int Implements the data operations for a one-dimensional static array of integrals. `uvm_field_sarray_int(ARG,FLAG) ARG is a one-dimensional static array of integrals, and FLAG
is a bitwise OR of one or more flag settings as described in
|
|
uvm_field_sarray_object(ARG, FLAG) |
MACRO `uvm_field_sarray_object Implements the data operations for a one-dimensional static array of
`uvm_field_sarray_object(ARG,FLAG) ARG is a one-dimensional static array of |
|
uvm_field_sarray_string(ARG, FLAG) |
MACRO `uvm_field_sarray_string Implements the data operations for a one-dimensional static array of strings. `uvm_field_sarray_string(ARG,FLAG) ARG is a one-dimensional static array of strings, and FLAG is a bitwise
OR of one or more flag settings as described in |
|
uvm_field_string(ARG, FLAG) |
MACRO `uvm_field_string Implements the data operations for a string property. `uvm_field_string(ARG,FLAG) ARG is a string property of the class, and FLAG is a bitwise OR of
one or more flag settings as described in |
|
uvm_field_utils_begin(T) |
MACRO `uvm_field_utils_end These macros form a block in which `uvm_field_* macros can be placed. Used as `uvm_field_utils_begin(TYPE)
`uvm_field_* macros here
`uvm_field_utils_end
These macros do not perform factory registration nor implement the get_type_name and create methods. Use this form when you need custom implementations of these two methods, or when you are setting up field macros for an abstract class (i.e. virtual class). |
|
uvm_field_utils_end |
||
uvm_file |
__FILE__ |
|
uvm_get_imp_decl(SFX) |
MACRO `uvm_get_imp_decl `uvm_get_imp_decl(SFX) Define the class uvm_get_impSFX for providing both blocking and non-blocking get implementations. SFX is the suffix for the new class type. |
|
uvm_get_peek_imp_decl(SFX) |
MACRO `uvm_get_peek_imp_decl `uvm_get_peek_imp_decl(SFX) Define the class uvm_get_peek_impSFX for providing both blocking and non-blocking get_peek implementations. SFX is the suffix for the new class type. |
|
uvm_info(ID, MSG, VERBOSITY) |
MACRO `uvm_info Calls uvm_report_info if VERBOSITY is lower than the configured verbosity of the associated reporter. ID is given as the message tag and MSG is given as the message text. The file and line are also sent to the uvm_report_info call. `uvm_info(ID, MSG, VERBOSITY) |
|
uvm_info_begin(ID, MSG, VERBOSITY, RM =__uvm_msg) |
MACRO `uvm_info_begin `uvm_info_begin(ID, MSG, VERBOSITY, RM = __uvm_msg) |
|
uvm_info_context(ID, MSG, VERBOSITY, RO) |
MACRO `uvm_info_context `uvm_info_context(ID, MSG, VERBOSITY, RO) Operates identically to `uvm_info but requires that the
context, or |
|
uvm_info_context_begin(ID, MSG, VERBOSITY, RO, RM =__uvm_msg) |
MACRO `uvm_info_context_begin `uvm_info_context_begin(ID, MSG, UVM_NONE, RO, RM = __uvm_msg) |
|
uvm_info_context_end |
MACRO `uvm_info_context_end `uvm_info_context_end This macro pair operates identically to |
|
uvm_info_end |
MACRO `uvm_info_end This macro pair provides the ability to add elements to messages. `uvm_info_end Example usage is shown here. ...
task my_task();
...
`uvm_info_begin("MY_ID", "This is my message...", UVM_LOW)
`uvm_message_add_tag("my_color", "red")
`uvm_message_add_int(my_int, UVM_DEC)
`uvm_message_add_string(my_string)
`uvm_message_add_object(my_obj)
`uvm_info_end
...
endtask
|
|
uvm_line |
__LINE__ |
|
uvm_master_imp_decl(SFX) |
MACRO `uvm_master_imp_decl `uvm_master_imp_decl(SFX) Define the class uvm_master_impSFX for providing both blocking and non-blocking master implementations. SFX is the suffix for the new class type. |
|
uvm_message_add_int(VAR, RADIX, LABEL ="", ACTION =(UVM_LOG|UVM_RM_RECORD)) |
MACRO `uvm_message_add_int `uvm_message_add_int(VAR, RADIX, LABEL = "", ACTION=(UVM_LOG|UVM_RM_RECORD)) |
|
uvm_message_add_object(VAR, LABEL ="", ACTION =(UVM_LOG|UVM_RM_RECORD)) |
MACRO `uvm_message_add_object These macros allow the user to provide elements that are associated with
`uvm_message_add_object(VAR, LABEL = "", ACTION=(UVM_LOG|UVM_RM_RECORD)) Example usage is shown in [`uvm_info_end](./index-macros.html#macros). |
|
uvm_message_add_string(VAR, LABEL ="", ACTION =(UVM_LOG|UVM_RM_RECORD)) |
MACRO `uvm_message_add_string `uvm_message_add_string(VAR, LABEL = "", ACTION=(UVM_LOG|UVM_RM_RECORD)) |
|
uvm_message_add_tag(NAME, VALUE, ACTION =(UVM_LOG|UVM_RM_RECORD)) |
MACRO `uvm_message_add_tag `uvm_message_add_tag(NAME, VALUE, ACTION=(UVM_LOG|UVM_RM_RECORD)) |
|
uvm_message_begin(SEVERITY, ID, MSG, VERBOSITY, FILE, LINE, RM) |
MACRO- `uvm_message_begin Undocumented. Library internal use. |
|
uvm_message_context_begin(SEVERITY, ID, MSG, VERBOSITY, FILE, LINE, RO, RM) |
MACRO- `uvm_message_context_begin Undocumented. Library internal use. |
|
uvm_message_context_end |
MACRO- `uvm_message_context_end Undocumented. Library internal use. |
|
uvm_message_end |
MACRO- `uvm_message_end Undocumented. Library internal use. |
|
uvm_new_func |
uvm_new_func |
|
uvm_non_blocking_transport_imp_decl(SFX) |
||
uvm_nonblocking_get_imp_decl(SFX) |
MACRO `uvm_nonblocking_get_imp_decl `uvm_nonblocking_get_imp_decl(SFX) Define the class uvm_nonblocking_get_impSFX for providing non-blocking get implementations. SFX is the suffix for the new class type. |
|
uvm_nonblocking_get_peek_imp_decl(SFX) |
MACRO `uvm_nonblocking_get_peek_imp_decl `uvm_nonblocking_get_peek_imp_decl(SFX) Define the class uvm_nonblocking_get_peek_impSFX for providing non-blocking get_peek implementation. |
|
uvm_nonblocking_master_imp_decl(SFX) |
MACRO `uvm_nonblocking_master_imp_decl `uvm_nonblocking_master_imp_decl(SFX) Define the class uvm_nonblocking_master_impSFX for providing the non-blocking master implementation. |
|
uvm_nonblocking_peek_imp_decl(SFX) |
MACRO `uvm_nonblocking_peek_imp_decl `uvm_nonblocking_peek_imp_decl(SFX) Define the class uvm_nonblocking_peek_impSFX for providing non-blocking peek implementations. SFX is the suffix for the new class type. |
|
uvm_nonblocking_put_imp_decl(SFX) |
MACRO `uvm_nonblocking_put_imp_decl `uvm_nonblocking_put_imp_decl(SFX) Define the class uvm_nonblocking_put_impSFX for providing non-blocking put implementations. SFX is the suffix for the new class type. |
|
uvm_nonblocking_slave_imp_decl(SFX) |
MACRO `uvm_nonblocking_slave_imp_decl `uvm_nonblocking_slave_imp_decl(SFX) Define the class uvm_nonblocking_slave_impSFX for providing the non-blocking slave implementation. |
|
uvm_nonblocking_transport_imp_decl(SFX) |
MACRO `uvm_nonblocking_transport_imp_decl `uvm_nonblocking_transport_imp_decl(SFX) Define the class uvm_nonblocking_transport_impSFX for providing the non-blocking transport implementation. |
|
uvm_object_param_utils(T) |
||
uvm_object_param_utils_begin(T) |
||
uvm_object_registry(T, S) |
MACRO `uvm_object_registry Register a uvm_object-based class with the factory `uvm_object_registry(T,S) Registers a uvm_object-based class T and lookup string S with the factory. S typically is the name of the class in quotes. The [`uvm_object_utils](./index-macros.html#macros) family of macros uses this macro. |
|
uvm_object_utils(T) |
MACRO `uvm_object_utils_end For simple objects with no field macros, use `uvm_object_utils(TYPE) For simple objects with field macros, use `uvm_object_utils_begin(TYPE)
`uvm_field_* macro invocations here
`uvm_object_utils_end
For parameterized objects with no field macros, use `uvm_object_param_utils(TYPE) For parameterized objects, with field macros, use `uvm_object_param_utils_begin(TYPE)
`uvm_field_* macro invocations here
`uvm_object_utils_end
Simple (non-parameterized) objects use the uvm_object_utils* versions, which do the following:
Parameterized classes must use the uvm_object_param_utils* versions. They differ from [`uvm_object_utils](./index-macros.html#macros) only in that they do not supply a type name when registering the object with the factory. As such, name-based lookup with the factory for parameterized classes is not possible. The macros with _begin suffixes are the same as the non-suffixed versions
except that they also start a block in which |
|
uvm_object_utils_begin(T) |
||
uvm_object_utils_end |
||
uvm_pack_array(VAR) |
Macro `uvm_pack_array Pack a dynamic array without having to also specify the bit size of its elements. Array size must be non-zero. `uvm_pack_array(VAR) |
|
uvm_pack_arrayN(VAR, SIZE) |
Macro `uvm_pack_arrayN Pack a dynamic array of integrals. `uvm_pack_arrayN(VAR,SIZE) |
|
uvm_pack_enum(VAR) |
Macro `uvm_pack_enum Pack an enumeration value. Packing does not require its type be specified. `uvm_pack_enum(VAR) |
|
uvm_pack_enumN(VAR, SIZE) |
Macro `uvm_pack_enumN Pack an integral variable. `uvm_pack_enumN(VAR,SIZE) |
|
uvm_pack_int(VAR) |
Macro `uvm_pack_int Pack an integral variable without having to also specify the bit size. `uvm_pack_int(VAR) |
|
uvm_pack_intN(VAR, SIZE) |
Macro `uvm_pack_intN Pack an integral variable. `uvm_pack_intN(VAR,SIZE) |
|
uvm_pack_queue(VAR) |
Macro `uvm_pack_queue Pack a queue without having to also specify the bit size of its elements. Queue must not be empty. `uvm_pack_queue(VAR) |
|
uvm_pack_queueN(VAR, SIZE) |
Macro `uvm_pack_queueN Pack a queue of integrals. `uvm_pack_queueN(VAR,SIZE) |
|
uvm_pack_real(VAR) |
Macro `uvm_pack_real Pack a variable of type real. `uvm_pack_real(VAR) |
|
uvm_pack_sarray(VAR) |
Macro `uvm_pack_sarray Pack a static array without having to also specify the bit size of its elements. `uvm_pack_sarray(VAR) |
|
uvm_pack_sarrayN(VAR, SIZE) |
Macro `uvm_pack_sarrayN Pack a static array of integrals. `uvm_pack_sarray(VAR,SIZE) |
|
uvm_pack_string(VAR) |
Macro `uvm_pack_string Pack a string variable. `uvm_pack_string(VAR) |
|
uvm_package(PKG) |
MACRO- `uvm_package Use `uvm_package to define the SV package and to create a bogus type to help automate triggering the static initializers of the package. Use uvm_end_package to endpackage. |
|
uvm_peek_imp_decl(SFX) |
MACRO `uvm_peek_imp_decl `uvm_peek_imp_decl(SFX) Define the class uvm_peek_impSFX for providing both blocking and non-blocking peek implementations. SFX is the suffix for the new class type. |
|
uvm_print_aa_int_key4(KEY, F, R, P) |
||
uvm_print_aa_int_object(F, FLAG) |
||
uvm_print_aa_int_object3(F, P, FLAG) |
||
uvm_print_aa_string_int(F) |
Associative array printing methods |
|
uvm_print_aa_string_int3(F, R, P) |
||
uvm_print_aa_string_object(F, FLAG) |
||
uvm_print_aa_string_object3(F, P, FLAG) |
||
uvm_print_aa_string_string(F) |
||
uvm_print_aa_string_string2(F, P) |
||
uvm_print_array_int(F, R) |
uvm_print_array* |
|
uvm_print_array_int3(F, R, P) |
||
uvm_print_array_object(F, FLAG) |
||
uvm_print_array_object3(F, P, FLAG) |
||
uvm_print_array_string(F) |
||
uvm_print_array_string2(F, P) |
||
uvm_print_enum(T, F, NM, P) |
uvm_print_enum |
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uvm_print_int(F, R) |
uvm_print_int* |
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uvm_print_int3(F, R, P) |
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uvm_print_int4(F, R, NM, P) |
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uvm_print_object(F) |
uvm_print_object* |
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uvm_print_object2(F, P) |
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uvm_print_object_qda4(F, P, T, FLAG) |
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uvm_print_object_queue(F, FLAG) |
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uvm_print_object_queue3(F, P, FLAG) |
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uvm_print_qda_enum(F, P, T, ET) |
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uvm_print_qda_int4(F, R, P, T) |
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uvm_print_queue_int(F, R) |
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uvm_print_queue_int3(F, R, P) |
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uvm_print_sarray_int3(F, R, P) |
uvm_print_sarray* |
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uvm_print_sarray_object(F, FLAG) |
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uvm_print_sarray_object3(F, P, FLAG) |
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uvm_print_sarray_string2(F, P) |
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uvm_print_string(F) |
uvm_print_string* |
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uvm_print_string2(F, P) |
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uvm_print_string_qda3(F, P, T) |
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uvm_print_string_queue(F) |
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uvm_print_string_queue2(F, P) |
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uvm_put_imp_decl(SFX) |
MACRO `uvm_put_imp_decl `uvm_put_imp_decl(SFX) Define the class uvm_put_impSFX for providing both blocking and non-blocking put implementations. SFX is the suffix for the new class type. |
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uvm_rand_send(SEQ_OR_ITEM) |
MACRO `uvm_rand_send `uvm_rand_send(SEQ_OR_ITEM) This macro processes the item or sequence that has been already been
allocated (possibly with |
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uvm_rand_send_pri(SEQ_OR_ITEM, PRIORITY) |
MACRO `uvm_rand_send_pri `uvm_rand_send_pri(SEQ_OR_ITEM, PRIORITY) This is the same as `uvm_rand_send except that the sequence item or sequence is executed with the priority specified in the argument. |
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uvm_rand_send_pri_with(SEQ_OR_ITEM, PRIORITY, CONSTRAINTS) |
MACRO `uvm_rand_send_pri_with `uvm_rand_send_pri_with(SEQ_OR_ITEM, PRIORITY, CONSTRAINTS) This is the same as `uvm_rand_send_pri except that the given constraint block is applied to the item or sequence in a randomize with statement before execution. |
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uvm_rand_send_with(SEQ_OR_ITEM, CONSTRAINTS) |
MACRO `uvm_rand_send_with `uvm_rand_send_with(SEQ_OR_ITEM, CONSTRAINTS) This is the same as `uvm_rand_send except that the given constraint block is applied to the item or sequence in a randomize with statement before execution. |
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uvm_record_field(NAME, VALUE) |
Macro `uvm_record_field Macro for recording arbitrary name-value pairs into a transaction recording database. Requires a valid transaction handle, as provided by the <uvm_transaction::begin_tr> and <uvm_component::begin_tr> methods. `uvm_record_field(NAME, VALUE) The default implementation will pass the name/value pair to [`uvm_record_attribute](./index-macros.html#macros) if enabled, otherwise the information will be passed to <uvm_recorder::record_generic>, with the VALUE being converted to a string using "%p" notation. recorder.record_generic(NAME,$sformatf("%p",VALUE));
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uvm_register_cb(T, CB) |
MACRO `uvm_register_cb `uvm_register_cb(T,CB) Registers the given CB callback type with the given T object type. If a type-callback pair is not registered then a warning is issued if an attempt is made to use the pair (add, delete, etc.). The registration will typically occur in the component that executes the given type of callback. For instance: virtual class mycb extends uvm_callback;
virtual function void doit();
endclass
class my_comp extends uvm_component;
`uvm_register_cb(my_comp,mycb)
...
task run_phase(uvm_phase phase);
...
`uvm_do_callbacks(my_comp, mycb, doit())
endtask
endclass
|
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uvm_send(SEQ_OR_ITEM) |
MACRO `uvm_send `uvm_send(SEQ_OR_ITEM) This macro processes the item or sequence that has been created using
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uvm_send_pri(SEQ_OR_ITEM, PRIORITY) |
MACRO `uvm_send_pri `uvm_send_pri(SEQ_OR_ITEM, PRIORITY) This is the same as `uvm_send except that the sequence item or sequence is executed with the priority specified in the argument. |
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uvm_sequence_library_package(PKG_NAME) |
MACRO- `uvm_sequence_library_package This macro is used to trigger static initializers in packages. `uvm_package creates a bogus type which gets referred to by uvm_sequence_library_package to make a package-based variable of the bogus type. |
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uvm_sequence_library_utils(TYPE) |
MACRO `uvm_sequence_library_utils `uvm_sequence_library_utils(TYPE) Declares the infrastructure needed to define extensions to the
typedef simple_seq_lib uvm_sequence_library #(simple_item);
class simple_seq_lib_RST extends simple_seq_lib;
`uvm_object_utils(simple_seq_lib_RST)
`uvm_sequence_library_utils(simple_seq_lib_RST)
function new(string name="");
super.new(name);
endfunction
endclass
Each library, itself a sequence, can then be started independently on different sequencers or in different phases of the same sequencer. See <uvm_sequencer_base::start_phase_sequence> for information on starting default sequences. |
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uvm_sequence_utils(TYPE_NAME, SEQUENCER) |
MACRO- `uvm_sequence_utils The sequence macros can be used in non-parameterized <uvm_sequence #(REQ,RSP)> extensions to pre-register the sequence with a given <uvm_sequencer #(REQ,RSP)> type. For sequences that do not use any `uvm_field macros: `uvm_sequence_utils(TYPE_NAME,SQR_TYPE_NAME) For sequences employing with field macros: `uvm_sequence_utils_begin(TYPE_NAME,SQR_TYPE_NAME)
`uvm_field_* macro invocations here
`uvm_sequence_utils_end
The sequence-specific macros perform the same function as the set of `uvm_object_*_utils macros except that they also register the sequence's type, TYPE_NAME, with the given sequencer type, SQR_TYPE_NAME, and define the p_sequencer variable and m_set_p_sequencer method. Use |
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uvm_sequence_utils_begin(TYPE_NAME, SEQUENCER) |
MACRO- `uvm_sequence_utils_begin |
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uvm_sequence_utils_end |
MACRO- `uvm_sequence_utils_end |
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uvm_sequencer_param_utils(TYPE_NAME) |
MACRO- `uvm_sequencer_param_utils |
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uvm_sequencer_param_utils_begin(TYPE_NAME) |
MACRO- `uvm_sequencer_param_utils_begin |
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uvm_sequencer_utils(TYPE_NAME) |
MACRO- `uvm_sequencer_utils |
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uvm_sequencer_utils_begin(TYPE_NAME) |
MACRO- `uvm_sequencer_utils_begin |
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uvm_sequencer_utils_end |
MACRO- `uvm_sequencer_utils_end The sequencer macros are used in uvm_sequencer-based class declarations in one of four ways. For simple sequencers, no field macros `uvm_sequencer_utils(SQR_TYPE_NAME) For simple sequencers, with field macros For parameterized sequencers, no field macros `uvm_sequencer_param_utils(SQR_TYPE_NAME) For parameterized sequencers, with field macros The sequencer-specific macros perform the same function as the set of `uvm_componenent_*utils macros except that they also declare the plumbing necessary for creating the sequencer's sequence library. This includes:
Use |
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uvm_set_super_type(T, ST) |
MACRO `uvm_set_super_type `uvm_set_super_type(T,ST) Defines the super type of T to be ST . This allows for derived class objects to inherit typewide callbacks that are registered with the base class. The registration will typically occur in the component that executes the given type of callback. For instance: virtual class mycb extend uvm_callback;
virtual function void doit();
endclass
class my_comp extends uvm_component;
`uvm_register_cb(my_comp,mycb)
...
task run_phase(uvm_phase phase);
...
`uvm_do_callbacks(my_comp, mycb, doit())
endtask
endclass
class my_derived_comp extends my_comp;
`uvm_set_super_type(my_derived_comp,my_comp)
...
task run_phase(uvm_phase phase);
...
`uvm_do_callbacks(my_comp, mycb, doit())
endtask
endclass
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uvm_slave_imp_decl(SFX) |
MACRO `uvm_slave_imp_decl `uvm_slave_imp_decl(SFX) Define the class uvm_slave_impSFX for providing both blocking and non-blocking slave implementations. SFX is the suffix for the new class type. |
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uvm_transport_imp_decl(SFX) |
MACRO `uvm_transport_imp_decl `uvm_transport_imp_decl(SFX) Define the class uvm_transport_impSFX for providing both blocking and non-blocking transport implementations. SFX is the suffix for the new class type. |
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uvm_typename(X) |
$typename(X) |
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uvm_unpack_array(VAR) |
Macro `uvm_unpack_array Unpack a dynamic array without having to also specify the bit size of its elements. Array size must be non-zero. `uvm_unpack_array(VAR) |
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uvm_unpack_arrayN(VAR, SIZE) |
Macro `uvm_unpack_arrayN Unpack into a dynamic array of integrals. `uvm_unpack_arrayN(VAR,SIZE) |
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uvm_unpack_enum(VAR, TYPE) |
Macro `uvm_unpack_enum Unpack an enumeration value, which requires its type be specified. `uvm_unpack_enum(VAR,TYPE) |
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uvm_unpack_enumN(VAR, SIZE, TYPE) |
Macro `uvm_unpack_enumN Unpack enum of type TYPE into VAR . `uvm_unpack_enumN(VAR,SIZE,TYPE) |
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uvm_unpack_int(VAR) |
Macro `uvm_unpack_int Unpack an integral variable without having to also specify the bit size. `uvm_unpack_int(VAR) |
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uvm_unpack_intN(VAR, SIZE) |
Macro `uvm_unpack_intN Unpack into an integral variable. `uvm_unpack_intN(VAR,SIZE) |
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uvm_unpack_queue(VAR) |
Macro `uvm_unpack_queue Unpack a queue without having to also specify the bit size of its elements. Queue must not be empty. `uvm_unpack_queue(VAR) |
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uvm_unpack_queueN(VAR, SIZE) |
Macro `uvm_unpack_queueN Unpack into a queue of integrals. `uvm_unpack_queue(VAR,SIZE) |
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uvm_unpack_real(VAR) |
Macro `uvm_unpack_real Unpack a variable of type real. `uvm_unpack_real(VAR) |
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uvm_unpack_sarray(VAR) |
Macro `uvm_unpack_sarray Unpack a static array without having to also specify the bit size of its elements. `uvm_unpack_sarray(VAR) |
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uvm_unpack_sarrayN(VAR, SIZE) |
Macro `uvm_unpack_sarrayN Unpack a static (fixed) array of integrals. `uvm_unpack_sarrayN(VAR,SIZE) |
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uvm_unpack_string(VAR) |
Macro `uvm_unpack_string Unpack a string variable. `uvm_unpack_string(VAR) |
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uvm_update_sequence_lib |
MACRO- `uvm_update_sequence_lib This macro populates the instance-specific sequence library for a sequencer. It should be invoked inside the sequencer��s constructor. |
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uvm_update_sequence_lib_and_item(USER_ITEM) |
MACRO- `uvm_update_sequence_lib_and_item This macro populates the instance specific sequence library for a sequencer,
and it registers the given The macro should be invoked inside the sequencer's constructor. |
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uvm_user_bottomup_phase(PHASE, COMP, PREFIX) |
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uvm_user_task_phase(PHASE, COMP, PREFIX) |
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uvm_user_topdown_phase(PHASE, COMP, PREFIX) |
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uvm_warning(ID, MSG) |
MACRO `uvm_warning Calls uvm_report_warning with a verbosity of UVM_NONE. The message cannot be turned off using the reporter's verbosity setting, but can be turned off by setting the action for the message. ID is given as the message tag and MSG is given as the message text. The file and line are also sent to the uvm_report_warning call. `uvm_warning(ID, MSG) |
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uvm_warning_begin(ID, MSG, RM =__uvm_msg) |
MACRO `uvm_warning_begin `uvm_warning_begin(ID, MSG, RM = __uvm_msg) |
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uvm_warning_context(ID, MSG, RO) |
MACRO `uvm_warning_context `uvm_warning_context(ID, MSG, RO) Operates identically to `uvm_warning but requires that the
context, or |
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uvm_warning_context_begin(ID, MSG, RO, RM =__uvm_msg) |
MACRO `uvm_warning_context_begin `uvm_warning_context_begin(ID, MSG, RO, RM = __uvm_msg) |
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uvm_warning_context_end |
MACRO `uvm_warning_context_end `uvm_warning_context_end This macro pair operates identically to |
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uvm_warning_end |
MACRO `uvm_warning_end This macro pair operates identically to `uvm_warning_end The usage shown in [`uvm_info_end](./index-macros.html#macros) works identically for this pair. |
verilog_lint
waive macro-name-style